| 1 | #
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| 2 | # Copyright (c) 2001-2004 Jakub Jermar
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| 3 | # All rights reserved.
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| 4 | #
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| 5 | # Redistribution and use in source and binary forms, with or without
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| 6 | # modification, are permitted provided that the following conditions
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| 7 | # are met:
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| 8 | #
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| 9 | # - Redistributions of source code must retain the above copyright
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| 10 | # notice, this list of conditions and the following disclaimer.
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| 11 | # - Redistributions in binary form must reproduce the above copyright
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| 12 | # notice, this list of conditions and the following disclaimer in the
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| 13 | # documentation and/or other materials provided with the distribution.
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| 14 | # - The name of the author may not be used to endorse or promote products
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| 15 | # derived from this software without specific prior written permission.
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| 16 | #
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| 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | #
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| 28 |
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| 29 | ## very low and hardware-level functions
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| 30 |
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| 31 | # Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error
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| 32 | # word and 1 means interrupt with error word
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| 33 | #define ERROR_WORD_INTERRUPT_LIST 0x00027d00
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| 34 |
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| 35 | .text
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| 36 |
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| 37 | .global paging_on
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| 38 | .global enable_l_apic_in_msr
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| 39 | .global interrupt_handlers
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| 40 | .global memsetb
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| 41 | .global memsetw
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| 42 | .global memcpy
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| 43 | .global memcpy_from_uspace
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| 44 | .global memcpy_from_uspace_failover_address
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| 45 | .global memcpy_to_uspace
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| 46 | .global memcpy_to_uspace_failover_address
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| 47 |
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| 48 |
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| 49 | # Wrapper for generic memsetb
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| 50 | memsetb:
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| 51 | jmp _memsetb
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| 52 |
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| 53 | # Wrapper for generic memsetw
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| 54 | memsetw:
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| 55 | jmp _memsetw
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| 56 |
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| 57 |
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| 58 | #define MEMCPY_DST 4
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| 59 | #define MEMCPY_SRC 8
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| 60 | #define MEMCPY_SIZE 12
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| 61 |
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| 62 | /** Copy memory to/from userspace.
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| 63 | *
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| 64 | * This is almost conventional memcpy().
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| 65 | * The difference is that there is a failover part
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| 66 | * to where control is returned from a page fault
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| 67 | * if the page fault occurs during copy_from_uspace()
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| 68 | * or copy_to_uspace().
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| 69 | *
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| 70 | * @param MEMCPY_DST(%esp) Destination address.
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| 71 | * @param MEMCPY_SRC(%esp) Source address.
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| 72 | * @param MEMCPY_SIZE(%esp) Size.
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| 73 | *
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| 74 | * @return MEMCPY_DST(%esp) on success and 0 on failure.
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| 75 | */
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| 76 | memcpy:
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| 77 | memcpy_from_uspace:
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| 78 | memcpy_to_uspace:
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| 79 | movl %edi, %edx /* save %edi */
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| 80 | movl %esi, %eax /* save %esi */
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| 81 |
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| 82 | movl MEMCPY_SIZE(%esp), %ecx
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| 83 | shrl $2, %ecx /* size / 4 */
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| 84 |
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| 85 | movl MEMCPY_DST(%esp), %edi
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| 86 | movl MEMCPY_SRC(%esp), %esi
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| 87 |
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| 88 | rep movsl /* copy whole words */
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| 89 |
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| 90 | movl MEMCPY_SIZE(%esp), %ecx
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| 91 | andl $3, %ecx /* size % 4 */
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| 92 | jz 0f
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| 93 |
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| 94 | rep movsb /* copy the rest byte by byte */
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| 95 |
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| 96 | 0:
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| 97 | movl %edx, %edi
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| 98 | movl %eax, %esi
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| 99 | movl MEMCPY_DST(%esp), %eax /* MEMCPY_DST(%esp), success */
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| 100 | ret
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| 101 |
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| 102 | /*
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| 103 | * We got here from as_page_fault() after the memory operations
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| 104 | * above had caused a page fault.
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| 105 | */
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| 106 | memcpy_from_uspace_failover_address:
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| 107 | memcpy_to_uspace_failover_address:
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| 108 | movl %edx, %edi
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| 109 | movl %eax, %esi
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| 110 | xorl %eax, %eax /* return 0, failure */
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| 111 | ret
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| 112 |
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| 113 | ## Turn paging on
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| 114 | #
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| 115 | # Enable paging and write-back caching in CR0.
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| 116 | #
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| 117 | paging_on:
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| 118 | movl %cr0, %edx
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| 119 | orl $(1 << 31), %edx # paging on
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| 120 | # clear Cache Disable and not Write Though
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| 121 | andl $~((1 << 30) | (1 << 29)), %edx
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| 122 | movl %edx,%cr0
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| 123 | jmp 0f
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| 124 | 0:
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| 125 | ret
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| 126 |
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| 127 |
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| 128 | ## Enable local APIC
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| 129 | #
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| 130 | # Enable local APIC in MSR.
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| 131 | #
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| 132 | enable_l_apic_in_msr:
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| 133 | movl $0x1b, %ecx
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| 134 | rdmsr
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| 135 | orl $(1 << 11), %eax
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| 136 | orl $(0xfee00000), %eax
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| 137 | wrmsr
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| 138 | ret
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| 139 |
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| 140 | # Clear nested flag
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| 141 | # overwrites %ecx
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| 142 | .macro CLEAR_NT_FLAG
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| 143 | pushfl
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| 144 | pop %ecx
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| 145 | and $0xffffbfff, %ecx
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| 146 | push %ecx
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| 147 | popfl
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| 148 | .endm
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| 149 |
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| 150 | /*
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| 151 | * The SYSENTER syscall mechanism can be used for syscalls with
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| 152 | * four or fewer arguments. To pass these four arguments, we
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| 153 | * use four registers: EDX, ECX, EBX, ESI. The syscall number
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| 154 | * is passed in EAX. We use EDI to remember the return address
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| 155 | * and EBP to remember the stack. The INT-based syscall mechanism
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| 156 | * can actually handle six arguments plus the syscall number
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| 157 | * entirely in registers.
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| 158 | */
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| 159 | .global sysenter_handler
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| 160 | sysenter_handler:
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| 161 | sti
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| 162 | pushl %ebp # remember user stack
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| 163 | pushl %edi # remember return user address
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| 164 |
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| 165 | xorl %ebp, %ebp # stop stack traces here
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| 166 |
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| 167 | pushl %gs # remember TLS
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| 168 |
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| 169 | pushl %eax # syscall number
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| 170 | subl $8, %esp # unused sixth and fifth argument
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| 171 | pushl %esi # fourth argument
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| 172 | pushl %ebx # third argument
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| 173 | pushl %ecx # second argument
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| 174 | pushl %edx # first argument
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| 175 |
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| 176 | movw $16, %ax
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| 177 | movw %ax, %ds
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| 178 | movw %ax, %es
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| 179 |
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| 180 | cld
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| 181 | call syscall_handler
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| 182 | addl $28, %esp # remove arguments from stack
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| 183 |
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| 184 | pop %gs # restore TLS
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| 185 |
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| 186 | pop %edx # prepare return EIP for SYSEXIT
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| 187 | pop %ecx # prepare userspace ESP for SYSEXIT
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| 188 |
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| 189 | sysexit # return to userspace
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| 190 |
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| 191 |
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| 192 | #define ISTATE_OFFSET_EAX 0
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| 193 | #define ISTATE_OFFSET_EBX 4
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| 194 | #define ISTATE_OFFSET_ECX 8
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| 195 | #define ISTATE_OFFSET_EDX 12
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| 196 | #define ISTATE_OFFSET_EDI 16
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| 197 | #define ISTATE_OFFSET_ESI 20
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| 198 | #define ISTATE_OFFSET_EBP 24
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| 199 | #define ISTATE_OFFSET_EBP_FRAME 28
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| 200 | #define ISTATE_OFFSET_EIP_FRAME 32
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| 201 | #define ISTATE_OFFSET_GS 36
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| 202 | #define ISTATE_OFFSET_FS 40
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| 203 | #define ISTATE_OFFSET_ES 44
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| 204 | #define ISTATE_OFFSET_DS 48
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| 205 | #define ISTATE_OFFSET_ERROR_WORD 52
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| 206 | #define ISTATE_OFFSET_EIP 56
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| 207 | #define ISTATE_OFFSET_CS 60
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| 208 | #define ISTATE_OFFSET_EFLAGS 64
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| 209 | #define ISTATE_OFFSET_ESP 68
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| 210 | #define ISTATE_OFFSET_SS 72
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| 211 |
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| 212 | /*
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| 213 | * Size of the istate structure without the hardware-saved part and without the
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| 214 | * error word.
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| 215 | */
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| 216 | #define ISTATE_SOFT_SIZE 52
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| 217 |
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| 218 | ## Declare interrupt handlers
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| 219 | #
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| 220 | # Declare interrupt handlers for n interrupt
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| 221 | # vectors starting at vector i.
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| 222 | #
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| 223 | # The handlers setup data segment registers
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| 224 | # and call exc_dispatch().
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| 225 | #
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| 226 | #define INTERRUPT_ALIGN 128
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| 227 | .macro handler i n
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| 228 |
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| 229 | .ifeq \i - 0x30 # Syscall handler
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| 230 | pushl %ds
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| 231 | pushl %es
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| 232 | pushl %fs
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| 233 | pushl %gs
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| 234 |
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| 235 | #
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| 236 | # Push syscall arguments onto the stack
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| 237 | #
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| 238 | # NOTE: The idea behind the order of arguments passed in registers is to
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| 239 | # use all scratch registers first and preserved registers next.
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| 240 | # An optimized libc syscall wrapper can make use of this setup.
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| 241 | #
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| 242 | pushl %eax
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| 243 | pushl %ebp
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| 244 | pushl %edi
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| 245 | pushl %esi
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| 246 | pushl %ebx
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| 247 | pushl %ecx
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| 248 | pushl %edx
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| 249 |
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| 250 | # we must fill the data segment registers
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| 251 | movw $16, %ax
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| 252 | movw %ax, %ds
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| 253 | movw %ax, %es
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| 254 |
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| 255 | xorl %ebp, %ebp
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| 256 |
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| 257 | cld
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| 258 | sti
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| 259 | # syscall_handler(edx, ecx, ebx, esi, edi, ebp, eax)
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| 260 | call syscall_handler
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| 261 | cli
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| 262 |
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| 263 | movl 20(%esp), %ebp # restore EBP
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| 264 | addl $28, %esp # clean-up of parameters
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| 265 |
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| 266 | popl %gs
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| 267 | popl %fs
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| 268 | popl %es
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| 269 | popl %ds
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| 270 |
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| 271 | CLEAR_NT_FLAG
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| 272 | iret
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| 273 | .else
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| 274 | /*
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| 275 | * This macro distinguishes between two versions of ia32 exceptions.
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| 276 | * One version has error word and the other does not have it.
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| 277 | * The latter version fakes the error word on the stack so that the
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| 278 | * handlers and istate_t can be the same for both types.
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| 279 | */
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| 280 | .iflt \i - 32
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| 281 | .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
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| 282 | #
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| 283 | # Exception with error word: do nothing
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| 284 | #
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| 285 | .else
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| 286 | #
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| 287 | # Exception without error word: fake up one
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| 288 | #
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| 289 | pushl $0
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| 290 | .endif
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| 291 | .else
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| 292 | #
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| 293 | # Interrupt: fake up one
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| 294 | #
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| 295 | pushl $0
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| 296 | .endif
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| 297 |
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| 298 | subl $ISTATE_SOFT_SIZE, %esp
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| 299 |
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| 300 | #
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| 301 | # Save the general purpose registers.
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| 302 | #
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| 303 | movl %eax, ISTATE_OFFSET_EAX(%esp)
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| 304 | movl %ebx, ISTATE_OFFSET_EBX(%esp)
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| 305 | movl %ecx, ISTATE_OFFSET_ECX(%esp)
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| 306 | movl %edx, ISTATE_OFFSET_EDX(%esp)
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| 307 | movl %edi, ISTATE_OFFSET_EDI(%esp)
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| 308 | movl %esi, ISTATE_OFFSET_ESI(%esp)
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| 309 | movl %ebp, ISTATE_OFFSET_EBP(%esp)
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| 310 |
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| 311 | #
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| 312 | # Save the selector registers.
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| 313 | #
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| 314 | movl %gs, %eax
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| 315 | movl %fs, %ebx
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| 316 | movl %es, %ecx
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| 317 | movl %ds, %edx
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| 318 |
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| 319 | movl %eax, ISTATE_OFFSET_GS(%esp)
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| 320 | movl %ebx, ISTATE_OFFSET_FS(%esp)
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| 321 | movl %ecx, ISTATE_OFFSET_ES(%esp)
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| 322 | movl %edx, ISTATE_OFFSET_DS(%esp)
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| 323 |
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| 324 | #
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| 325 | # Switch to kernel selectors.
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| 326 | #
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| 327 | movl $16, %eax
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| 328 | movl %eax, %ds
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| 329 | movl %eax, %es
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| 330 |
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| 331 | #
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| 332 | # Imitate a regular stack frame linkage.
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| 333 | # Stop stack traces here if we came from userspace.
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| 334 | #
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| 335 | cmpl $8, ISTATE_OFFSET_CS(%esp)
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| 336 | jz 0f
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| 337 | xorl %ebp, %ebp
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| 338 | 0: movl %ebp, ISTATE_OFFSET_EBP_FRAME(%esp)
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| 339 | movl ISTATE_OFFSET_EIP(%esp), %eax
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| 340 | movl %eax, ISTATE_OFFSET_EIP_FRAME(%esp)
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| 341 | leal ISTATE_OFFSET_EBP_FRAME(%esp), %ebp
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| 342 |
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| 343 | pushl %esp # pass istate address
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| 344 | pushl $(\i) # pass intnum
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| 345 | call exc_dispatch # exc_dispatch(intnum, istate)
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| 346 | addl $8, %esp # Clear arguments from the stack
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| 347 |
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| 348 | CLEAR_NT_FLAG
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| 349 |
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| 350 | #
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| 351 | # Restore the selector registers.
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| 352 | #
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| 353 | movl ISTATE_OFFSET_GS(%esp), %eax
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| 354 | movl ISTATE_OFFSET_FS(%esp), %ebx
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| 355 | movl ISTATE_OFFSET_ES(%esp), %ecx
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| 356 | movl ISTATE_OFFSET_DS(%esp), %edx
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| 357 |
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| 358 | movl %eax, %gs
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| 359 | movl %ebx, %fs
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| 360 | movl %ecx, %es
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| 361 | movl %edx, %ds
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| 362 |
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| 363 | #
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| 364 | # Restore the scratch registers and the preserved registers the handler
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| 365 | # cloberred itself (i.e. EBX and EBP).
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| 366 | #
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| 367 | movl ISTATE_OFFSET_EAX(%esp), %eax
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| 368 | movl ISTATE_OFFSET_EBX(%esp), %ebx
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| 369 | movl ISTATE_OFFSET_ECX(%esp), %ecx
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| 370 | movl ISTATE_OFFSET_EDX(%esp), %edx
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| 371 | movl ISTATE_OFFSET_EBP(%esp), %ebp
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| 372 |
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| 373 | addl $(ISTATE_SOFT_SIZE + 4), %esp
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| 374 | iret
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| 375 | .endif
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| 376 |
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| 377 | .align INTERRUPT_ALIGN
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| 378 | .if (\n- \i) - 1
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| 379 | handler "(\i + 1)", \n
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| 380 | .endif
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| 381 | .endm
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| 382 |
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| 383 | # keep in sync with pm.h !!!
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| 384 | IDT_ITEMS = 64
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| 385 | .align INTERRUPT_ALIGN
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| 386 | interrupt_handlers:
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| 387 | h_start:
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| 388 | handler 0 IDT_ITEMS
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| 389 | h_end:
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| 390 |
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| 391 | .data
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| 392 | .global interrupt_handler_size
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| 393 |
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| 394 | interrupt_handler_size: .long (h_end - h_start) / IDT_ITEMS
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