source: mainline/kernel/arch/ia32/include/mm/page.h@ a1e98de

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since a1e98de was 17ccb9d7, checked in by Martin Decky <martin@…>, 15 years ago

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[f761f1eb]1/*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[17ccb9d7]29/** @addtogroup ia32mm
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[06e1e95]35#ifndef KERN_ia32_PAGE_H_
36#define KERN_ia32_PAGE_H_
[f761f1eb]37
[d1f8a87]38#include <arch/mm/frame.h>
[7a0359b]39#include <trace.h>
[d1f8a87]40
[086d4fd]41#define PAGE_WIDTH FRAME_WIDTH
[f761f1eb]42#define PAGE_SIZE FRAME_SIZE
43
[d1f8a87]44#ifdef KERNEL
45
[8f2153b]46#ifndef __ASM__
[7f1c620]47# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
48# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
[8f2153b]49#else
[45d6add]50# define KA2PA(x) ((x) - 0x80000000)
51# define PA2KA(x) ((x) + 0x80000000)
[8f2153b]52#endif
[f761f1eb]53
[992bbb97]54/*
55 * Implementation of generic 4-level page table interface.
56 * IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
57 */
[c03ee1c]58
59/* Number of entries in each level. */
[ecbdc724]60#define PTL0_ENTRIES_ARCH 1024
61#define PTL1_ENTRIES_ARCH 0
62#define PTL2_ENTRIES_ARCH 0
63#define PTL3_ENTRIES_ARCH 1024
64
[c03ee1c]65/* Page table sizes for each level. */
66#define PTL0_SIZE_ARCH ONE_FRAME
67#define PTL1_SIZE_ARCH 0
68#define PTL2_SIZE_ARCH 0
69#define PTL3_SIZE_ARCH ONE_FRAME
[6b781c0]70
[c03ee1c]71/* Macros calculating indices for each level. */
[b3f8fb7]72#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)
[992bbb97]73#define PTL1_INDEX_ARCH(vaddr) 0
74#define PTL2_INDEX_ARCH(vaddr) 0
[b3f8fb7]75#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff)
[992bbb97]76
[c03ee1c]77/* Get PTE address accessors for each level. */
78#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
79 ((pte_t *) ((((pte_t *) (ptl0))[(i)].frame_address) << 12))
80#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
81 (ptl1)
82#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \
83 (ptl2)
84#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
85 ((uintptr_t) ((((pte_t *) (ptl3))[(i)].frame_address) << 12))
86
87/* Set PTE address accessors for each level. */
88#define SET_PTL0_ADDRESS_ARCH(ptl0) \
89 (write_cr3((uintptr_t) (ptl0)))
90#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
91 (((pte_t *) (ptl0))[(i)].frame_address = (a) >> 12)
[ff9f858]92#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
93#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
[c03ee1c]94#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
95 (((pte_t *) (ptl3))[(i)].frame_address = (a) >> 12)
96
97/* Get PTE flags accessors for each level. */
98#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
[98000fb]99 get_pt_flags((pte_t *) (ptl0), (size_t) (i))
[c03ee1c]100#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
101 PAGE_PRESENT
102#define GET_PTL3_FLAGS_ARCH(ptl2, i) \
103 PAGE_PRESENT
104#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
[98000fb]105 get_pt_flags((pte_t *) (ptl3), (size_t) (i))
[c03ee1c]106
107/* Set PTE flags accessors for each level. */
[17ccb9d7]108#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
[98000fb]109 set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x))
[ff9f858]110#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
111#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
[c03ee1c]112#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
[98000fb]113 set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x))
[c03ee1c]114
115/* Macros for querying the last level entries. */
116#define PTE_VALID_ARCH(p) \
117 (*((uint32_t *) (p)) != 0)
118#define PTE_PRESENT_ARCH(p) \
119 ((p)->present != 0)
120#define PTE_GET_FRAME_ARCH(p) \
121 ((p)->frame_address << FRAME_WIDTH)
122#define PTE_WRITABLE_ARCH(p) \
123 ((p)->writeable != 0)
[fb84455]124#define PTE_EXECUTABLE_ARCH(p) 1
[ecbdc724]125
[8f2153b]126#ifndef __ASM__
127
[b3f8fb7]128#include <mm/mm.h>
129#include <arch/interrupt.h>
[f4c2b6a]130#include <typedefs.h>
[8f2153b]131
[567807b1]132/* Page fault error codes. */
133
[c03ee1c]134/** When bit on this position is 0, the page fault was caused by a not-present
135 * page.
136 */
[b3f8fb7]137#define PFERR_CODE_P (1 << 0)
[567807b1]138
139/** When bit on this position is 1, the page fault was caused by a write. */
[b3f8fb7]140#define PFERR_CODE_RW (1 << 1)
[567807b1]141
142/** When bit on this position is 1, the page fault was caused in user mode. */
[b3f8fb7]143#define PFERR_CODE_US (1 << 2)
[567807b1]144
145/** When bit on this position is 1, a reserved bit was set in page directory. */
[b3f8fb7]146#define PFERR_CODE_RSVD (1 << 3)
[f761f1eb]147
[0eef314]148/** Page Table Entry. */
149typedef struct {
150 unsigned present : 1;
151 unsigned writeable : 1;
152 unsigned uaccessible : 1;
153 unsigned page_write_through : 1;
154 unsigned page_cache_disable : 1;
155 unsigned accessed : 1;
156 unsigned dirty : 1;
157 unsigned pat : 1;
158 unsigned global : 1;
159 unsigned soft_valid : 1; /**< Valid content even if the present bit is not set. */
160 unsigned avl : 2;
161 unsigned frame_address : 20;
162} __attribute__ ((packed)) pte_t;
163
[7a0359b]164NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
[ff9f858]165{
166 pte_t *p = &pt[i];
167
[c03ee1c]168 return ((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT |
169 (!p->present) << PAGE_PRESENT_SHIFT |
170 p->uaccessible << PAGE_USER_SHIFT |
171 1 << PAGE_READ_SHIFT |
172 p->writeable << PAGE_WRITE_SHIFT |
173 1 << PAGE_EXEC_SHIFT |
174 p->global << PAGE_GLOBAL_SHIFT);
[ff9f858]175}
176
[7a0359b]177NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags)
[ff9f858]178{
179 pte_t *p = &pt[i];
180
181 p->page_cache_disable = !(flags & PAGE_CACHEABLE);
182 p->present = !(flags & PAGE_NOT_PRESENT);
[51029384]183 p->uaccessible = (flags & PAGE_USER) != 0;
184 p->writeable = (flags & PAGE_WRITE) != 0;
[bfb87df]185 p->global = (flags & PAGE_GLOBAL) != 0;
[0882a9a]186
187 /*
[c03ee1c]188 * Ensure that there is at least one bit set even if the present bit is
189 * cleared.
[0882a9a]190 */
191 p->soft_valid = true;
[ff9f858]192}
[992bbb97]193
[f761f1eb]194extern void page_arch_init(void);
[214ec25c]195extern void page_fault(unsigned int, istate_t *);
[f761f1eb]196
[8f2153b]197#endif /* __ASM__ */
198
[d1f8a87]199#endif /* KERNEL */
200
[f761f1eb]201#endif
[b45c443]202
[06e1e95]203/** @}
[b45c443]204 */
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