[f761f1eb] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2001-2004 Jakub Jermar
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[f761f1eb] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[1bb2e7a] | 29 | /** @addtogroup ia32
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[06e1e95] | 35 | #ifndef KERN_ia32_CPUID_H_
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| 36 | #define KERN_ia32_CPUID_H_
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[f761f1eb] | 37 |
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| 38 | #include <arch/types.h>
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| 39 |
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[f429331] | 40 | typedef struct {
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[7f1c620] | 41 | uint32_t cpuid_eax;
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| 42 | uint32_t cpuid_ebx;
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| 43 | uint32_t cpuid_ecx;
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| 44 | uint32_t cpuid_edx;
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[f429331] | 45 | } __attribute__ ((packed)) cpu_info_t;
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[f761f1eb] | 46 |
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[3b05862f] | 47 | struct __cpuid_extended_feature_info {
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| 48 | unsigned sse3 : 1;
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| 49 | unsigned : 31;
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| 50 | } __attribute__ ((packed));
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| 51 |
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[f3fed18] | 52 | typedef union cpuid_extended_feature_info {
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[3b05862f] | 53 | struct __cpuid_extended_feature_info bits;
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[f3fed18] | 54 | uint32_t word;
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| 55 | } cpuid_extended_feature_info;
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[3b05862f] | 56 |
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| 57 | struct __cpuid_feature_info {
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| 58 | unsigned : 23;
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| 59 | unsigned mmx : 1;
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| 60 | unsigned fxsr : 1;
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| 61 | unsigned sse : 1;
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| 62 | unsigned sse2 : 1;
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| 63 | unsigned : 5;
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| 64 | } __attribute__ ((packed));
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| 65 |
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[f3fed18] | 66 | typedef union cpuid_feature_info {
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[3b05862f] | 67 | struct __cpuid_feature_info bits;
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[f3fed18] | 68 | uint32_t word;
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| 69 | } cpuid_feature_info;
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[3b05862f] | 70 |
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| 71 |
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[7f1c620] | 72 | static inline uint32_t has_cpuid(void)
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[bd2933a8] | 73 | {
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[7f1c620] | 74 | uint32_t val, ret;
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[bd2933a8] | 75 |
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[e7b7be3f] | 76 | asm volatile (
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[bd2933a8] | 77 | "pushf\n" /* read flags */
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| 78 | "popl %0\n"
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| 79 | "movl %0, %1\n"
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| 80 |
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| 81 | "btcl $21, %1\n" /* swap the ID bit */
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| 82 |
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| 83 | "pushl %1\n" /* propagate the change into flags */
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| 84 | "popf\n"
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| 85 | "pushf\n"
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| 86 | "popl %1\n"
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| 87 |
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| 88 | "andl $(1 << 21), %0\n" /* interrested only in ID bit */
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| 89 | "andl $(1 << 21), %1\n"
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| 90 | "xorl %1, %0\n"
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| 91 | : "=r" (ret), "=r" (val)
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| 92 | );
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| 93 |
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| 94 | return ret;
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| 95 | }
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[f761f1eb] | 96 |
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[f429331] | 97 | static inline void cpuid(uint32_t cmd, cpu_info_t *info)
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[d6dcdd2e] | 98 | {
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[e7b7be3f] | 99 | asm volatile (
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[bd2933a8] | 100 | "cpuid\n"
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[6fa4888b] | 101 | : "=a" (info->cpuid_eax), "=b" (info->cpuid_ebx), "=c" (info->cpuid_ecx), "=d" (info->cpuid_edx)
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[f3fed18] | 102 | : "a" (cmd)
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[bd2933a8] | 103 | );
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[d6dcdd2e] | 104 | }
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[f761f1eb] | 105 |
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| 106 | #endif
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[b45c443] | 107 |
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[1bb2e7a] | 108 | /** @}
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[b45c443] | 109 | */
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