source: mainline/kernel/arch/arm32/src/userspace.c

Last change on this file was 3fcea34, checked in by Jiří Zárevúcky <zarevucky.jiri@…>, 9 months ago

Simplify the SYS_THREAD_CREATE syscall interface

Removed the beefy uarg structure. Instead, the syscall gets two
parameters: %pc (program counter) and %sp (stack pointer). It starts
a thread with those values in corresponding registers, with no other
fuss whatsoever.

libc initializes threads by storing any other needed arguments on
the stack and retrieving them in thread_entry. Importantly, this
includes the address of the
thread_main function which is now
called indirectly to fix dynamic linking issues on some archs.

There's a bit of weirdness on SPARC and IA-64, because of their
stacked register handling. The current solution is that we require
some space *above* the stack pointer to be available for those
architectures. I think for SPARC, it can be made more normal.

For the remaining ones, we can (probably) just set the initial
%sp to the top edge of the stack. There's some lingering offsets
on some archs just because I didn't want to accidentally break
anything. The initial thread bringup should be functionally
unchanged from the previous state, and no binaries are currently
multithreaded except thread1 test, so there should be minimal
risk of breakage. Naturally, I tested all available emulator
builds, save for msim.

  • Property mode set to 100644
File size: 2.8 KB
RevLine 
[6b781c0]1/*
[d4a829e]2 * Copyright (c) 2007 Petr Stepan, Pavel Jancik
[6b781c0]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[c5429fe]29/** @addtogroup kernel_arm32
[6b781c0]30 * @{
31 */
32/** @file
33 * @brief Userspace switch.
34 */
35
[76d0981d]36#include <stdbool.h>
[6b781c0]37#include <userspace.h>
[82a04c6]38#include <arch/ras.h>
[6b781c0]39
40/** Struct for holding all general purpose registers.
[26aafe8]41 *
[6b781c0]42 * Used to set registers when going to userspace.
43 */
44typedef struct {
45 uint32_t r0;
46 uint32_t r1;
47 uint32_t r2;
48 uint32_t r3;
49 uint32_t r4;
50 uint32_t r5;
51 uint32_t r6;
52 uint32_t r7;
53 uint32_t r8;
54 uint32_t r9;
55 uint32_t r10;
56 uint32_t r11;
57 uint32_t r12;
58 uint32_t sp;
59 uint32_t lr;
60 uint32_t pc;
61} ustate_t;
62
[3fcea34]63uintptr_t arch_get_initial_sp(uintptr_t stack_base, uintptr_t stack_size)
64{
65 return stack_base + stack_size;
66}
67
[26aafe8]68/** Change processor mode
69 *
70 * @param kernel_uarg Userspace settings (entry point, stack, ...).
[6b781c0]71 *
72 */
[3fcea34]73void userspace(uintptr_t pc, uintptr_t sp)
[6b781c0]74{
[3fcea34]75 volatile ustate_t ustate = { };
[c98e6ee]76
[82a04c6]77 /* pass the RAS page address in %r2 */
78 ustate.r2 = (uintptr_t) ras_page;
79
[3fcea34]80 ustate.sp = sp;
81 ustate.pc = pc;
[6b781c0]82
83 /* status register in user mode */
84 ipl_t user_mode = current_status_reg_read() &
85 (~STATUS_REG_MODE_MASK | USER_MODE);
86
87 /* set user mode, set registers, jump */
88 asm volatile (
[1433ecda]89 "mov sp, %[ustate]\n"
90 "msr spsr_c, %[user_mode]\n"
91 "ldmfd sp, {r0-r12, sp, lr}^\n"
92 "nop\n" /* Cannot access sp immediately after ldm(2) */
93 "add sp, sp, #(15*4)\n"
94 "ldmfd sp!, {pc}^\n"
95 :: [ustate] "r" (&ustate), [user_mode] "r" (user_mode)
[6b781c0]96 );
97
[88e43bc]98 unreachable();
[6b781c0]99}
100
101/** @}
102 */
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