source: mainline/kernel/arch/arm32/src/mach/integratorcp/integratorcp.c@ f554a94

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since f554a94 was f554a94, checked in by Jakub Jermar <jakub@…>, 14 years ago

Fix the visual for Integrator/CP.
  • Property mode set to 100644
File size: 9.0 KB
Line 
1/*
2 * Copyright (c) 2009 Vineeth Pillai
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup arm32integratorcp
30 * @{
31 */
32/** @file
33 * @brief ICP drivers.
34 */
35
36#include <interrupt.h>
37#include <ipc/irq.h>
38#include <console/chardev.h>
39#include <genarch/drivers/pl050/pl050.h>
40#include <genarch/kbrd/kbrd.h>
41#include <console/console.h>
42#include <sysinfo/sysinfo.h>
43#include <print.h>
44#include <ddi/device.h>
45#include <mm/page.h>
46#include <mm/frame.h>
47#include <arch/mm/frame.h>
48#include <arch/mach/integratorcp/integratorcp.h>
49#include <genarch/fb/fb.h>
50#include <genarch/fb/visuals.h>
51#include <ddi/ddi.h>
52#include <print.h>
53
54#define SDRAM_SIZE (sdram[((*(uint32_t *)(ICP_CMCR+ICP_SDRAMCR_OFFSET) & ICP_SDRAM_MASK) >> 2)])
55static parea_t fb_parea;
56static icp_hw_map_t icp_hw_map;
57static irq_t icp_timer_irq;
58struct arm_machine_ops icp_machine_ops = {
59 icp_init,
60 icp_timer_irq_start,
61 icp_cpu_halt,
62 icp_get_memory_extents,
63 icp_irq_exception,
64 icp_frame_init,
65 icp_output_init,
66 icp_input_init,
67 icp_get_irq_count,
68 icp_get_platform_name
69};
70
71static bool hw_map_init_called = false;
72static bool vga_init = false;
73uint32_t sdram[8] = {
74 16777216, /* 16mb */
75 33554432, /* 32mb */
76 67108864, /* 64mb */
77 134217728, /* 128mb */
78 268435456, /* 256mb */
79 0, /* Reserverd */
80 0, /* Reserverd */
81 0 /* Reserverd */
82 };
83
84void icp_vga_init(void);
85
86/** Initializes the vga
87 *
88 */
89void icp_vga_init(void)
90{
91 *(uint32_t*)((char *)(icp_hw_map.cmcr)+0x14) = 0xA05F0000;
92 *(uint32_t*)((char *)(icp_hw_map.cmcr)+0x1C) = 0x12C11000;
93 *(uint32_t*)icp_hw_map.vga = 0x3F1F3F9C;
94 *(uint32_t*)((char *)(icp_hw_map.vga) + 0x4) = 0x080B61DF;
95 *(uint32_t*)((char *)(icp_hw_map.vga) + 0x8) = 0x067F3800;
96 *(uint32_t*)((char *)(icp_hw_map.vga) + 0x10) = ICP_FB;
97 *(uint32_t *)((char *)(icp_hw_map.vga) + 0x1C) = 0x182B;
98 *(uint32_t*)((char *)(icp_hw_map.cmcr)+0xC) = 0x33805000;
99
100}
101
102/** Returns the mask of active interrupts. */
103static inline uint32_t icp_irqc_get_sources(void)
104{
105 return *((uint32_t *) icp_hw_map.irqc);
106}
107
108
109/** Masks interrupt.
110 *
111 * @param irq interrupt number
112 */
113static inline void icp_irqc_mask(uint32_t irq)
114{
115 *((uint32_t *) icp_hw_map.irqc_mask) = (1 << irq);
116}
117
118
119/** Unmasks interrupt.
120 *
121 * @param irq interrupt number
122 */
123static inline void icp_irqc_unmask(uint32_t irq)
124{
125 *((uint32_t *) icp_hw_map.irqc_unmask) |= (1 << irq);
126}
127
128/** Initializes icp_hw_map. */
129void icp_init(void)
130{
131 icp_hw_map.uart = hw_map(ICP_UART, PAGE_SIZE);
132 icp_hw_map.kbd_ctrl = hw_map(ICP_KBD, PAGE_SIZE);
133 icp_hw_map.kbd_stat = icp_hw_map.kbd_ctrl + ICP_KBD_STAT;
134 icp_hw_map.kbd_data = icp_hw_map.kbd_ctrl + ICP_KBD_DATA;
135 icp_hw_map.kbd_intstat = icp_hw_map.kbd_ctrl + ICP_KBD_INTR_STAT;
136 icp_hw_map.rtc = hw_map(ICP_RTC, PAGE_SIZE);
137 icp_hw_map.rtc1_load = icp_hw_map.rtc + ICP_RTC1_LOAD_OFFSET;
138 icp_hw_map.rtc1_read = icp_hw_map.rtc + ICP_RTC1_READ_OFFSET;
139 icp_hw_map.rtc1_ctl = icp_hw_map.rtc + ICP_RTC1_CTL_OFFSET;
140 icp_hw_map.rtc1_intrclr = icp_hw_map.rtc + ICP_RTC1_INTRCLR_OFFSET;
141 icp_hw_map.rtc1_bgload = icp_hw_map.rtc + ICP_RTC1_BGLOAD_OFFSET;
142 icp_hw_map.rtc1_intrstat = icp_hw_map.rtc + ICP_RTC1_INTRSTAT_OFFSET;
143
144 icp_hw_map.irqc = hw_map(ICP_IRQC, PAGE_SIZE);
145 icp_hw_map.irqc_mask = icp_hw_map.irqc + ICP_IRQC_MASK_OFFSET;
146 icp_hw_map.irqc_unmask = icp_hw_map.irqc + ICP_IRQC_UNMASK_OFFSET;
147 icp_hw_map.cmcr = hw_map(ICP_CMCR, PAGE_SIZE);
148 icp_hw_map.sdramcr = icp_hw_map.cmcr + ICP_SDRAMCR_OFFSET;
149 icp_hw_map.vga = hw_map(ICP_VGA, PAGE_SIZE);
150
151 hw_map_init_called = true;
152}
153
154/** Starts icp Real Time Clock device, which asserts regular interrupts.
155 *
156 * @param frequency Interrupts frequency (0 disables RTC).
157 */
158static void icp_timer_start(uint32_t frequency)
159{
160 icp_irqc_mask(ICP_TIMER_IRQ);
161 *((uint32_t*) icp_hw_map.rtc1_load) = frequency;
162 *((uint32_t*) icp_hw_map.rtc1_bgload) = frequency;
163 *((uint32_t*) icp_hw_map.rtc1_ctl) = ICP_RTC_CTL_VALUE;
164 icp_irqc_unmask(ICP_TIMER_IRQ);
165}
166
167static irq_ownership_t icp_timer_claim(irq_t *irq)
168{
169 if (icp_hw_map.rtc1_intrstat) {
170 *((uint32_t*) icp_hw_map.rtc1_intrclr) = 1;
171 return IRQ_ACCEPT;
172 } else
173 return IRQ_DECLINE;
174}
175
176/** Timer interrupt handler.
177 *
178 * @param irq Interrupt information.
179 * @param arg Not used.
180 */
181static void icp_timer_irq_handler(irq_t *irq)
182{
183 /*
184 * We are holding a lock which prevents preemption.
185 * Release the lock, call clock() and reacquire the lock again.
186 */
187
188 spinlock_unlock(&irq->lock);
189 clock();
190 spinlock_lock(&irq->lock);
191
192}
193
194/** Initializes and registers timer interrupt handler. */
195static void icp_timer_irq_init(void)
196{
197 irq_initialize(&icp_timer_irq);
198 icp_timer_irq.devno = device_assign_devno();
199 icp_timer_irq.inr = ICP_TIMER_IRQ;
200 icp_timer_irq.claim = icp_timer_claim;
201 icp_timer_irq.handler = icp_timer_irq_handler;
202
203 irq_register(&icp_timer_irq);
204}
205
206
207/** Starts timer.
208 *
209 * Initiates regular timer interrupts after initializing
210 * corresponding interrupt handler.
211 */
212void icp_timer_irq_start(void)
213{
214 icp_timer_irq_init();
215 icp_timer_start(ICP_TIMER_FREQ);
216}
217
218/** Get extents of available memory.
219 *
220 * @param start Place to store memory start address.
221 * @param size Place to store memory size.
222 */
223void icp_get_memory_extents(uintptr_t *start, uintptr_t *size)
224{
225 *start = 0;
226
227 if (hw_map_init_called) {
228 *size = (sdram[((*(uint32_t *)icp_hw_map.sdramcr &
229 ICP_SDRAM_MASK) >> 2)]);
230 } else {
231 *size = SDRAM_SIZE;
232 }
233}
234
235/** Stops icp. */
236void icp_cpu_halt(void)
237{
238 while (1);
239}
240
241/** interrupt exception handler.
242 *
243 * Determines sources of the interrupt from interrupt controller and
244 * calls high-level handlers for them.
245 *
246 * @param exc_no Interrupt exception number.
247 * @param istate Saved processor state.
248 */
249void icp_irq_exception(unsigned int exc_no, istate_t *istate)
250{
251 uint32_t sources = icp_irqc_get_sources();
252 unsigned int i;
253
254 for (i = 0; i < ICP_IRQC_MAX_IRQ; i++) {
255 if (sources & (1 << i)) {
256 irq_t *irq = irq_dispatch_and_lock(i);
257 if (irq) {
258 /* The IRQ handler was found. */
259 irq->handler(irq);
260 spinlock_unlock(&irq->lock);
261 } else {
262 /* Spurious interrupt.*/
263 printf("cpu%d: spurious interrupt (inum=%d)\n",
264 CPU->id, i);
265 }
266 }
267 }
268}
269
270/*
271 * Integrator specific frame initialization
272 */
273void
274icp_frame_init(void)
275{
276 frame_mark_unavailable(ICP_FB_FRAME, ICP_FB_NUM_FRAME);
277 frame_mark_unavailable(0, 256);
278}
279
280void icp_output_init(void)
281{
282#ifdef CONFIG_FB
283 if (!vga_init) {
284 icp_vga_init();
285 vga_init = true;
286 }
287
288 fb_properties_t prop = {
289 .addr = ICP_FB,
290 .offset = 0,
291 .x = 640,
292 .y = 480,
293 .scan = 2560,
294 .visual = VISUAL_RGB_8_8_8_0,
295 };
296
297 outdev_t *fbdev = fb_init(&prop);
298 if (fbdev) {
299 stdout_wire(fbdev);
300 fb_parea.pbase = ICP_FB;
301 fb_parea.frames = 300;
302 fb_parea.unpriv = false;
303 ddi_parea_register(&fb_parea);
304 }
305#endif
306}
307
308void icp_input_init(void)
309{
310
311 pl050_t *pl050 = malloc(sizeof(pl050_t), FRAME_ATOMIC);
312 pl050->status = (ioport8_t *)icp_hw_map.kbd_stat;
313 pl050->data = (ioport8_t *)icp_hw_map.kbd_data;
314 pl050->ctrl = (ioport8_t *)icp_hw_map.kbd_ctrl;
315
316 pl050_instance_t *pl050_instance = pl050_init(pl050, ICP_KBD_IRQ);
317 if (pl050_instance) {
318 kbrd_instance_t *kbrd_instance = kbrd_init();
319 if (kbrd_instance) {
320 icp_irqc_mask(ICP_KBD_IRQ);
321 indev_t *sink = stdin_wire();
322 indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
323 pl050_wire(pl050_instance, kbrd);
324 icp_irqc_unmask(ICP_KBD_IRQ);
325 }
326 }
327
328 /*
329 * This is the necessary evil until the userspace driver is entirely
330 * self-sufficient.
331 */
332 sysinfo_set_item_val("kbd", NULL, true);
333 sysinfo_set_item_val("kbd.inr", NULL, ICP_KBD_IRQ);
334 sysinfo_set_item_val("kbd.address.status", NULL,
335 (uintptr_t) icp_hw_map.kbd_stat);
336 sysinfo_set_item_val("kbd.address.data", NULL,
337 (uintptr_t) icp_hw_map.kbd_data);
338
339}
340
341size_t icp_get_irq_count(void)
342{
343 return ICP_IRQ_COUNT;
344}
345
346const char *icp_get_platform_name(void)
347{
348 return "integratorcp";
349}
350
351/** @}
352 */
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