1 | /*
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2 | * Copyright (c) 2012 Matteo Facchinetti
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3 | * Copyright (c) 2012 Maurizio Lombardi
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4 | * All rights reserved.
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5 | *
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6 | * Redistribution and use in source and binary forms, with or without
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7 | * modification, are permitted provided that the following conditions
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8 | * are met:
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9 | *
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10 | * - Redistributions of source code must retain the above copyright
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11 | * notice, this list of conditions and the following disclaimer.
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12 | * - Redistributions in binary form must reproduce the above copyright
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13 | * notice, this list of conditions and the following disclaimer in the
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14 | * documentation and/or other materials provided with the distribution.
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15 | * - The name of the author may not be used to endorse or promote products
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16 | * derived from this software without specific prior written permission.
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17 | *
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18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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28 | */
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29 | /** @addtogroup kernel_arm32_beaglebone
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30 | * @{
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31 | */
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32 | /** @file
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33 | * @brief BeagleBone platform driver.
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34 | */
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35 |
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36 | #include <arch/exception.h>
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37 | #include <arch/mach/beaglebone/beaglebone.h>
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38 | #include <assert.h>
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39 | #include <genarch/drivers/am335x/irc.h>
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40 | #include <genarch/drivers/am335x/uart.h>
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41 | #include <genarch/drivers/am335x/timer.h>
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42 | #include <genarch/drivers/am335x/cm_per.h>
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43 | #include <genarch/drivers/am335x/cm_dpll.h>
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44 | #include <genarch/drivers/am335x/ctrl_module.h>
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45 | #include <genarch/srln/srln.h>
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46 | #include <interrupt.h>
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47 | #include <ddi/ddi.h>
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48 | #include <mm/km.h>
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49 | #include <stdbool.h>
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50 |
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51 | #define BBONE_MEMORY_START 0x80000000 /* physical */
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52 | #define BBONE_MEMORY_SIZE 0x10000000 /* 256 MB */
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53 |
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54 | static void bbone_init(void);
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55 | static void bbone_timer_irq_start(void);
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56 | static void bbone_cpu_halt(void);
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57 | static void bbone_get_memory_extents(uintptr_t *start, size_t *size);
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58 | static void bbone_irq_exception(unsigned int exc_no, istate_t *istate);
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59 | static void bbone_frame_init(void);
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60 | static void bbone_output_init(void);
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61 | static void bbone_input_init(void);
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62 | static size_t bbone_get_irq_count(void);
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63 | static const char *bbone_get_platform_name(void);
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64 |
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65 | static struct beaglebone {
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66 | omap_irc_regs_t *irc_addr;
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67 | am335x_cm_per_regs_t *cm_per_addr;
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68 | am335x_cm_dpll_regs_t *cm_dpll_addr;
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69 | am335x_ctrl_module_t *ctrl_module;
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70 | am335x_timer_t timer;
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71 | omap_uart_t uart;
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72 | } bbone;
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73 |
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74 | struct arm_machine_ops bbone_machine_ops = {
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75 | .machine_init = bbone_init,
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76 | .machine_timer_irq_start = bbone_timer_irq_start,
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77 | .machine_cpu_halt = bbone_cpu_halt,
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78 | .machine_get_memory_extents = bbone_get_memory_extents,
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79 | .machine_irq_exception = bbone_irq_exception,
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80 | .machine_frame_init = bbone_frame_init,
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81 | .machine_output_init = bbone_output_init,
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82 | .machine_input_init = bbone_input_init,
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83 | .machine_get_irq_count = bbone_get_irq_count,
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84 | .machine_get_platform_name = bbone_get_platform_name,
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85 | };
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86 |
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87 | static void bbone_init(void)
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88 | {
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89 | bbone.irc_addr = (void *) km_map(AM335x_IRC_BASE_ADDRESS,
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90 | AM335x_IRC_SIZE, KM_NATURAL_ALIGNMENT, PAGE_NOT_CACHEABLE);
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91 |
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92 | bbone.cm_per_addr = (void *) km_map(AM335x_CM_PER_BASE_ADDRESS,
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93 | AM335x_CM_PER_SIZE, KM_NATURAL_ALIGNMENT, PAGE_NOT_CACHEABLE);
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94 |
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95 | bbone.cm_dpll_addr = (void *) km_map(AM335x_CM_DPLL_BASE_ADDRESS,
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96 | AM335x_CM_DPLL_SIZE, KM_NATURAL_ALIGNMENT, PAGE_NOT_CACHEABLE);
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97 |
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98 | bbone.ctrl_module = (void *) km_map(AM335x_CTRL_MODULE_BASE_ADDRESS,
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99 | AM335x_CTRL_MODULE_SIZE, KM_NATURAL_ALIGNMENT,
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100 | PAGE_NOT_CACHEABLE);
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101 |
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102 | assert(bbone.irc_addr != NULL);
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103 | assert(bbone.cm_per_addr != NULL);
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104 | assert(bbone.cm_dpll_addr != NULL);
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105 | assert(bbone.ctrl_module != NULL);
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106 |
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107 | /* Initialize the interrupt controller */
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108 | omap_irc_init(bbone.irc_addr);
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109 | }
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110 |
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111 | static irq_ownership_t bbone_timer_irq_claim(irq_t *irq)
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112 | {
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113 | return IRQ_ACCEPT;
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114 | }
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115 |
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116 | static void bbone_timer_irq_handler(irq_t *irq)
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117 | {
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118 | am335x_timer_intr_ack(&bbone.timer);
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119 | irq_spinlock_unlock(&irq->lock, false);
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120 | clock();
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121 | irq_spinlock_lock(&irq->lock, false);
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122 | }
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123 |
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124 | static void bbone_timer_irq_start(void)
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125 | {
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126 | unsigned sysclk_freq;
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127 | errno_t rc;
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128 |
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129 | /* Initialize the IRQ */
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130 | static irq_t timer_irq;
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131 | irq_initialize(&timer_irq);
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132 | timer_irq.inr = AM335x_DMTIMER2_IRQ;
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133 | timer_irq.claim = bbone_timer_irq_claim;
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134 | timer_irq.handler = bbone_timer_irq_handler;
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135 | irq_register(&timer_irq);
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136 |
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137 | /* Enable the DMTIMER2 clock module */
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138 | am335x_clock_module_enable(bbone.cm_per_addr, DMTIMER2);
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139 | /* Select the SYSCLK as the clock source for the dmtimer2 module */
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140 | am335x_clock_source_select(bbone.cm_dpll_addr, DMTIMER2,
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141 | CLK_SRC_M_OSC);
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142 | /* Initialize the DMTIMER2 */
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143 | if (am335x_ctrl_module_clock_freq_get(bbone.ctrl_module,
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144 | &sysclk_freq) != EOK) {
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145 | printf("Cannot get the system clock frequency!\n");
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146 | return;
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147 | } else
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148 | printf("system clock running at %u hz\n", sysclk_freq);
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149 |
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150 | rc = am335x_timer_init(&bbone.timer, DMTIMER2, HZ, sysclk_freq);
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151 | if (rc != EOK) {
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152 | printf("Timer initialization failed\n");
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153 | return;
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154 | }
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155 | /* Enable the interrupt */
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156 | omap_irc_enable(bbone.irc_addr, AM335x_DMTIMER2_IRQ);
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157 | /* Start the timer */
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158 | am335x_timer_start(&bbone.timer);
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159 | }
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160 |
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161 | static void bbone_cpu_halt(void)
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162 | {
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163 | while (true)
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164 | ;
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165 | }
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166 |
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167 | /** Get extents of available memory.
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168 | *
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169 | * @param start Place to store memory start address (physical).
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170 | * @param size Place to store memory size.
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171 | */
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172 | static void bbone_get_memory_extents(uintptr_t *start, size_t *size)
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173 | {
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174 | *start = BBONE_MEMORY_START;
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175 | *size = BBONE_MEMORY_SIZE;
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176 | }
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177 |
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178 | static void bbone_irq_exception(unsigned int exc_no, istate_t *istate)
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179 | {
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180 | const unsigned inum = omap_irc_inum_get(bbone.irc_addr);
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181 |
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182 | irq_t *irq = irq_dispatch_and_lock(inum);
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183 | if (irq) {
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184 | /* The IRQ handler was found. */
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185 | irq->handler(irq);
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186 | irq_spinlock_unlock(&irq->lock, false);
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187 | } else {
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188 | printf("Spurious interrupt\n");
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189 | }
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190 |
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191 | omap_irc_irq_ack(bbone.irc_addr);
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192 | }
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193 |
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194 | static void bbone_frame_init(void)
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195 | {
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196 | }
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197 |
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198 | static void bbone_output_init(void)
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199 | {
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200 | #ifdef CONFIG_OMAP_UART
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201 | const bool ok = omap_uart_init(&bbone.uart,
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202 | AM335x_UART0_IRQ, AM335x_UART0_BASE_ADDRESS,
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203 | AM335x_UART0_SIZE);
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204 |
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205 | if (ok)
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206 | stdout_wire(&bbone.uart.outdev);
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207 | #endif
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208 | }
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209 |
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210 | static void bbone_input_init(void)
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211 | {
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212 | #ifdef CONFIG_OMAP_UART
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213 | srln_instance_t *srln_instance = srln_init();
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214 | if (srln_instance) {
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215 | indev_t *sink = stdin_wire();
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216 | indev_t *srln = srln_wire(srln_instance, sink);
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217 | omap_uart_input_wire(&bbone.uart, srln);
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218 | omap_irc_enable(bbone.irc_addr, AM335x_UART0_IRQ);
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219 | }
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220 | #endif
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221 | }
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222 |
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223 | size_t bbone_get_irq_count(void)
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224 | {
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225 | return AM335x_IRC_IRQ_COUNT;
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226 | }
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227 |
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228 | const char *bbone_get_platform_name(void)
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229 | {
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230 | return "beaglebone";
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231 | }
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232 |
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233 | /**
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234 | * @}
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235 | */
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