source: mainline/kernel/arch/arm32/src/mach/beaglebone/beaglebone.c@ 06c4609

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 06c4609 was 06c4609, checked in by Maurizio Lombardi <m.lombardi85@…>, 12 years ago

remove debug message

  • Property mode set to 100644
File size: 6.4 KB
Line 
1/*
2 * Copyright (c) 2012 Matteo Facchinetti
3 * Copyright (c) 2012 Maurizio Lombardi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29/** @addtogroup arm32beaglebone
30 * @{
31 */
32/** @file
33 * @brief BeagleBone platform driver.
34 */
35
36#include <arch/exception.h>
37#include <arch/mach/beaglebone/beaglebone.h>
38#include <genarch/drivers/am335x/irc.h>
39#include <genarch/drivers/am335x/uart.h>
40#include <genarch/drivers/am335x/timer.h>
41#include <genarch/drivers/am335x/cm_per.h>
42#include <genarch/drivers/am335x/cm_dpll.h>
43#include <genarch/drivers/am335x/ctrl_module.h>
44#include <genarch/srln/srln.h>
45#include <interrupt.h>
46#include <ddi/ddi.h>
47#include <ddi/device.h>
48#include <mm/km.h>
49
50#define BBONE_MEMORY_START 0x80000000 /* physical */
51#define BBONE_MEMORY_SIZE 0x10000000 /* 256 MB */
52
53static void bbone_init(void);
54static void bbone_timer_irq_start(void);
55static void bbone_cpu_halt(void);
56static void bbone_get_memory_extents(uintptr_t *start, size_t *size);
57static void bbone_irq_exception(unsigned int exc_no, istate_t *istate);
58static void bbone_frame_init(void);
59static void bbone_output_init(void);
60static void bbone_input_init(void);
61static size_t bbone_get_irq_count(void);
62static const char *bbone_get_platform_name(void);
63
64static struct beaglebone {
65 am335x_irc_regs_t *irc_addr;
66 am335x_cm_per_regs_t *cm_per_addr;
67 am335x_cm_dpll_regs_t *cm_dpll_addr;
68 am335x_ctrl_module_t *ctrl_module;
69 am335x_timer_t timer;
70 am335x_uart_t uart;
71} bbone;
72
73struct arm_machine_ops bbone_machine_ops = {
74 .machine_init = bbone_init,
75 .machine_timer_irq_start = bbone_timer_irq_start,
76 .machine_cpu_halt = bbone_cpu_halt,
77 .machine_get_memory_extents = bbone_get_memory_extents,
78 .machine_irq_exception = bbone_irq_exception,
79 .machine_frame_init = bbone_frame_init,
80 .machine_output_init = bbone_output_init,
81 .machine_input_init = bbone_input_init,
82 .machine_get_irq_count = bbone_get_irq_count,
83 .machine_get_platform_name = bbone_get_platform_name,
84};
85
86static void bbone_init(void)
87{
88 bbone.irc_addr = (void *) km_map(AM335x_IRC_BASE_ADDRESS,
89 AM335x_IRC_SIZE, PAGE_NOT_CACHEABLE);
90
91 bbone.cm_per_addr = (void *) km_map(AM335x_CM_PER_BASE_ADDRESS,
92 AM335x_CM_PER_SIZE, PAGE_NOT_CACHEABLE);
93
94 bbone.cm_dpll_addr = (void *) km_map(AM335x_CM_DPLL_BASE_ADDRESS,
95 AM335x_CM_DPLL_SIZE, PAGE_NOT_CACHEABLE);
96
97 bbone.ctrl_module = (void *) km_map(AM335x_CTRL_MODULE_BASE_ADDRESS,
98 AM335x_CTRL_MODULE_SIZE, PAGE_NOT_CACHEABLE);
99
100 /* Initialize the interrupt controller */
101 am335x_irc_init(bbone.irc_addr);
102}
103
104static irq_ownership_t bbone_timer_irq_claim(irq_t *irq)
105{
106 return IRQ_ACCEPT;
107}
108
109static void bbone_timer_irq_handler(irq_t *irq)
110{
111 am335x_timer_intr_ack(&bbone.timer);
112 spinlock_unlock(&irq->lock);
113 clock();
114 spinlock_lock(&irq->lock);
115}
116
117static void bbone_timer_irq_start(void)
118{
119 unsigned sysclk_freq;
120
121 /* Initialize the IRQ */
122 static irq_t timer_irq;
123 irq_initialize(&timer_irq);
124 timer_irq.devno = device_assign_devno();
125 timer_irq.inr = AM335x_DMTIMER2_IRQ;
126 timer_irq.claim = bbone_timer_irq_claim;
127 timer_irq.handler = bbone_timer_irq_handler;
128 irq_register(&timer_irq);
129
130 /* Enable the DMTIMER2 clock module */
131 am335x_clock_module_enable(bbone.cm_per_addr, DMTIMER2);
132 /* Select the SYSCLK as the clock source for the dmtimer2 module */
133 am335x_clock_source_select(bbone.cm_dpll_addr, DMTIMER2,
134 CLK_SRC_M_OSC);
135 /* Initialize the DMTIMER2 */
136 if (am335x_ctrl_module_clock_freq_get(bbone.ctrl_module,
137 &sysclk_freq) != EOK) {
138 printf("Cannot get the system clock frequency!\n");
139 return;
140 }
141
142 am335x_timer_init(&bbone.timer, DMTIMER2, HZ, sysclk_freq);
143 /* Enable the interrupt */
144 am335x_irc_enable(bbone.irc_addr, AM335x_DMTIMER2_IRQ);
145 /* Start the timer */
146 am335x_timer_start(&bbone.timer);
147}
148
149static void bbone_cpu_halt(void)
150{
151 while (1);
152}
153
154/** Get extents of available memory.
155 *
156 * @param start Place to store memory start address (physical).
157 * @param size Place to store memory size.
158 */
159static void bbone_get_memory_extents(uintptr_t *start, size_t *size)
160{
161 *start = BBONE_MEMORY_START;
162 *size = BBONE_MEMORY_SIZE;
163}
164
165static void bbone_irq_exception(unsigned int exc_no, istate_t *istate)
166{
167 const unsigned inum = am335x_irc_inum_get(bbone.irc_addr);
168 am335x_irc_irq_ack(bbone.irc_addr);
169
170 irq_t *irq = irq_dispatch_and_lock(inum);
171 if (irq) {
172 /* The IRQ handler was found. */
173 irq->handler(irq);
174 spinlock_unlock(&irq->lock);
175 } else {
176 printf("Spurious interrupt\n");
177 }
178}
179
180static void bbone_frame_init(void)
181{
182}
183
184static void bbone_output_init(void)
185{
186 const bool ok = am335x_uart_init(&bbone.uart,
187 AM335x_UART0_IRQ, AM335x_UART0_BASE_ADDRESS,
188 AM335x_UART0_SIZE);
189
190 if (ok)
191 stdout_wire(&bbone.uart.outdev);
192}
193
194static void bbone_input_init(void)
195{
196 srln_instance_t *srln_instance = srln_init();
197 if (srln_instance) {
198 indev_t *sink = stdin_wire();
199 indev_t *srln = srln_wire(srln_instance, sink);
200 am335x_uart_input_wire(&bbone.uart, srln);
201 am335x_irc_enable(bbone.irc_addr, AM335x_UART0_IRQ);
202 }
203}
204
205size_t bbone_get_irq_count(void)
206{
207 return AM335x_IRC_IRQ_COUNT;
208}
209
210const char *bbone_get_platform_name(void)
211{
212 return "beaglebone";
213}
214
215/**
216 * @}
217 */
218
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