source: mainline/kernel/arch/arm32/src/interrupt.c@ 4bd3f45

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 4bd3f45 was 0e796cc, checked in by Jiri Svoboda <jiri@…>, 15 years ago

Allow different number of IRQs for each arm machine.

  • Property mode set to 100644
File size: 3.0 KB
Line 
1/*
2 * Copyright (c) 2007 Petr Stepan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup arm32
30 * @{
31 */
32/** @file
33 * @brief Interrupts controlling routines.
34 */
35
36#include <arch/asm.h>
37#include <arch/regutils.h>
38#include <arch/machine_func.h>
39#include <ddi/irq.h>
40#include <ddi/device.h>
41#include <interrupt.h>
42
43/** Disable interrupts.
44 *
45 * @return Old interrupt priority level.
46 */
47ipl_t interrupts_disable(void)
48{
49 ipl_t ipl = current_status_reg_read();
50
51 current_status_reg_control_write(STATUS_REG_IRQ_DISABLED_BIT | ipl);
52
53 return ipl;
54}
55
56/** Enable interrupts.
57 *
58 * @return Old interrupt priority level.
59 */
60ipl_t interrupts_enable(void)
61{
62 ipl_t ipl = current_status_reg_read();
63
64 current_status_reg_control_write(ipl & ~STATUS_REG_IRQ_DISABLED_BIT);
65
66 return ipl;
67}
68
69/** Restore interrupt priority level.
70 *
71 * @param ipl Saved interrupt priority level.
72 */
73void interrupts_restore(ipl_t ipl)
74{
75 current_status_reg_control_write(
76 (current_status_reg_read() & ~STATUS_REG_IRQ_DISABLED_BIT) |
77 (ipl & STATUS_REG_IRQ_DISABLED_BIT));
78}
79
80/** Read interrupt priority level.
81 *
82 * @return Current interrupt priority level.
83 */
84ipl_t interrupts_read(void)
85{
86 return current_status_reg_read();
87}
88
89/** Check interrupts state.
90 *
91 * @return True if interrupts are disabled.
92 *
93 */
94bool interrupts_disabled(void)
95{
96 return current_status_reg_read() & STATUS_REG_IRQ_DISABLED_BIT;
97}
98
99/** Initialize basic tables for exception dispatching
100 * and starts the timer.
101 */
102void interrupt_init(void)
103{
104 size_t irq_count;
105
106 irq_count = machine_get_irq_count();
107 irq_init(irq_count, irq_count);
108
109 machine_timer_irq_start();
110}
111
112/** @}
113 */
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