source: mainline/kernel/arch/arm32/src/interrupt.c

Last change on this file was c5429fe, checked in by Jakub Jermar <jakub@…>, 7 years ago

Disambiguate architecture specific doxygroups

  • Property mode set to 100644
File size: 2.9 KB
Line 
1/*
2 * Copyright (c) 2007 Petr Stepan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup kernel_arm32
30 * @{
31 */
32/** @file
33 * @brief Interrupts controlling routines.
34 */
35
36#include <arch/asm.h>
37#include <arch/regutils.h>
38#include <arch/machine_func.h>
39#include <ddi/irq.h>
40#include <interrupt.h>
41
42/** Disable interrupts.
43 *
44 * @return Old interrupt priority level.
45 */
46ipl_t interrupts_disable(void)
47{
48 ipl_t ipl = current_status_reg_read();
49
50 current_status_reg_control_write(STATUS_REG_IRQ_DISABLED_BIT | ipl);
51
52 return ipl;
53}
54
55/** Enable interrupts.
56 *
57 * @return Old interrupt priority level.
58 */
59ipl_t interrupts_enable(void)
60{
61 ipl_t ipl = current_status_reg_read();
62
63 current_status_reg_control_write(ipl & ~STATUS_REG_IRQ_DISABLED_BIT);
64
65 return ipl;
66}
67
68/** Restore interrupt priority level.
69 *
70 * @param ipl Saved interrupt priority level.
71 */
72void interrupts_restore(ipl_t ipl)
73{
74 current_status_reg_control_write(
75 (current_status_reg_read() & ~STATUS_REG_IRQ_DISABLED_BIT) |
76 (ipl & STATUS_REG_IRQ_DISABLED_BIT));
77}
78
79/** Read interrupt priority level.
80 *
81 * @return Current interrupt priority level.
82 */
83ipl_t interrupts_read(void)
84{
85 return current_status_reg_read();
86}
87
88/** Check interrupts state.
89 *
90 * @return True if interrupts are disabled.
91 *
92 */
93bool interrupts_disabled(void)
94{
95 return current_status_reg_read() & STATUS_REG_IRQ_DISABLED_BIT;
96}
97
98/** Initialize basic tables for exception dispatching
99 * and starts the timer.
100 */
101void interrupt_init(void)
102{
103 size_t irq_count;
104
105 irq_count = machine_get_irq_count();
106 irq_init(irq_count, irq_count);
107
108 machine_timer_irq_start();
109}
110
111/** @}
112 */
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