| 1 | /*
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| 2 | * Copyright (c) 2007 Petr Stepan
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup arm32
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * @brief Exception handlers and exception initialization routines.
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| 34 | */
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| 35 |
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| 36 | #include <arch/exception.h>
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| 37 | #include <arch/memstr.h>
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| 38 | #include <arch/regutils.h>
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| 39 | #include <arch/machine_func.h>
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| 40 | #include <interrupt.h>
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| 41 | #include <arch/mm/page_fault.h>
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| 42 | #include <arch/barrier.h>
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| 43 | #include <print.h>
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| 44 | #include <syscall/syscall.h>
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| 45 | #include <stacktrace.h>
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| 46 |
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| 47 | /** Offset used in calculation of exception handler's relative address.
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| 48 | *
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| 49 | * @see install_handler()
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| 50 | */
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| 51 | #define PREFETCH_OFFSET 0x8
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| 52 |
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| 53 | /** LDR instruction's code */
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| 54 | #define LDR_OPCODE 0xe59ff000
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| 55 |
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| 56 | /** Number of exception vectors. */
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| 57 | #define EXC_VECTORS 8
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| 58 |
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| 59 | /** Size of memory block occupied by exception vectors. */
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| 60 | #define EXC_VECTORS_SIZE (EXC_VECTORS * 4)
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| 61 |
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| 62 | /** Updates specified exception vector to jump to given handler.
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| 63 | *
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| 64 | * Addresses of handlers are stored in memory following exception vectors.
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| 65 | */
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| 66 | static void install_handler(unsigned handler_addr, unsigned *vector)
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| 67 | {
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| 68 | /* relative address (related to exc. vector) of the word
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| 69 | * where handler's address is stored
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| 70 | */
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| 71 | volatile uint32_t handler_address_ptr = EXC_VECTORS_SIZE -
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| 72 | PREFETCH_OFFSET;
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| 73 |
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| 74 | /* make it LDR instruction and store at exception vector */
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| 75 | *vector = handler_address_ptr | LDR_OPCODE;
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| 76 | smc_coherence(*vector);
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| 77 |
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| 78 | /* store handler's address */
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| 79 | *(vector + EXC_VECTORS) = handler_addr;
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| 80 |
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| 81 | }
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| 82 |
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| 83 | /** Software Interrupt handler.
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| 84 | *
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| 85 | * Dispatches the syscall.
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| 86 | *
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| 87 | */
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| 88 | static void swi_exception(unsigned int exc_no, istate_t *istate)
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| 89 | {
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| 90 | istate->r0 = syscall_handler(istate->r0, istate->r1, istate->r2,
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| 91 | istate->r3, istate->r4, istate->r5, istate->r6);
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| 92 | }
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| 93 |
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| 94 | /** Fills exception vectors with appropriate exception handlers. */
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| 95 | void install_exception_handlers(void)
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| 96 | {
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| 97 | install_handler((unsigned) reset_exception_entry,
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| 98 | (unsigned *) EXC_RESET_VEC);
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| 99 |
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| 100 | install_handler((unsigned) undef_instr_exception_entry,
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| 101 | (unsigned *) EXC_UNDEF_INSTR_VEC);
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| 102 |
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| 103 | install_handler((unsigned) swi_exception_entry,
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| 104 | (unsigned *) EXC_SWI_VEC);
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| 105 |
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| 106 | install_handler((unsigned) prefetch_abort_exception_entry,
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| 107 | (unsigned *) EXC_PREFETCH_ABORT_VEC);
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| 108 |
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| 109 | install_handler((unsigned) data_abort_exception_entry,
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| 110 | (unsigned *) EXC_DATA_ABORT_VEC);
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| 111 |
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| 112 | install_handler((unsigned) irq_exception_entry,
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| 113 | (unsigned *) EXC_IRQ_VEC);
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| 114 |
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| 115 | install_handler((unsigned) fiq_exception_entry,
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| 116 | (unsigned *) EXC_FIQ_VEC);
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| 117 | }
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| 118 |
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| 119 | #ifdef HIGH_EXCEPTION_VECTORS
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| 120 | /** Activates use of high exception vectors addresses. */
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| 121 | static void high_vectors(void)
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| 122 | {
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| 123 | uint32_t control_reg;
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| 124 |
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| 125 | asm volatile (
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| 126 | "mrc p15, 0, %[control_reg], c1, c1"
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| 127 | : [control_reg] "=r" (control_reg)
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| 128 | );
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| 129 |
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| 130 | /* switch on the high vectors bit */
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| 131 | control_reg |= CP15_R1_HIGH_VECTORS_BIT;
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| 132 |
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| 133 | asm volatile (
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| 134 | "mcr p15, 0, %[control_reg], c1, c1"
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| 135 | :: [control_reg] "r" (control_reg)
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| 136 | );
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| 137 | }
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| 138 | #endif
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| 139 |
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| 140 | /** Interrupt Exception handler.
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| 141 | *
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| 142 | * Determines the sources of interrupt and calls their handlers.
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| 143 | */
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| 144 | static void irq_exception(unsigned int exc_no, istate_t *istate)
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| 145 | {
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| 146 | machine_irq_exception(exc_no, istate);
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| 147 | }
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| 148 |
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| 149 | /** Initializes exception handling.
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| 150 | *
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| 151 | * Installs low-level exception handlers and then registers
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| 152 | * exceptions and their handlers to kernel exception dispatcher.
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| 153 | */
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| 154 | void exception_init(void)
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| 155 | {
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| 156 | #ifdef HIGH_EXCEPTION_VECTORS
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| 157 | high_vectors();
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| 158 | #endif
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| 159 | install_exception_handlers();
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| 160 |
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| 161 | exc_register(EXC_IRQ, "interrupt", true,
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| 162 | (iroutine_t) irq_exception);
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| 163 | exc_register(EXC_PREFETCH_ABORT, "prefetch abort", true,
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| 164 | (iroutine_t) prefetch_abort);
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| 165 | exc_register(EXC_DATA_ABORT, "data abort", true,
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| 166 | (iroutine_t) data_abort);
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| 167 | exc_register(EXC_SWI, "software interrupt", true,
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| 168 | (iroutine_t) swi_exception);
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| 169 | }
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| 170 |
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| 171 | /** Prints #istate_t structure content.
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| 172 | *
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| 173 | * @param istate Structure to be printed.
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| 174 | */
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| 175 | void istate_decode(istate_t *istate)
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| 176 | {
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| 177 | printf("r0 =%#0.8lx\tr1 =%#0.8lx\tr2 =%#0.8lx\tr3 =%#0.8lx\n",
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| 178 | istate->r0, istate->r1, istate->r2, istate->r3);
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| 179 | printf("r4 =%#0.8lx\tr5 =%#0.8lx\tr6 =%#0.8lx\tr7 =%#0.8lx\n",
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| 180 | istate->r4, istate->r5, istate->r6, istate->r7);
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| 181 | printf("r8 =%#0.8lx\tr9 =%#0.8lx\tr10=%#0.8lx\tfp =%#0.8lx\n",
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| 182 | istate->r8, istate->r9, istate->r10, istate->fp);
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| 183 | printf("r12=%#0.8lx\tsp =%#0.8lx\tlr =%#0.8lx\tspsr=%#0.8lx\n",
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| 184 | istate->r12, istate->sp, istate->lr, istate->spsr);
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| 185 | }
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| 186 |
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| 187 | /** @}
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| 188 | */
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