[d630139] | 1 | /*
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[6b781c0] | 2 | * Copyright (c) 2007 Michal Kebrt
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[d630139] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup arm32
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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[6b781c0] | 33 | * @brief CPU identification.
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[d630139] | 34 | */
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| 35 |
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[6b781c0] | 36 | #include <arch/cpu.h>
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[d630139] | 37 | #include <cpu.h>
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[6b781c0] | 38 | #include <arch.h>
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[d630139] | 39 | #include <print.h>
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| 40 |
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[6b781c0] | 41 | /** Number of indexes left out in the #imp_data array */
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| 42 | #define IMP_DATA_START_OFFSET 0x40
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| 43 |
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| 44 | /** Implementators (vendor) names */
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| 45 | static char *imp_data[] = {
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| 46 | "?", /* IMP_DATA_START_OFFSET */
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| 47 | "ARM Ltd", /* 0x41 */
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| 48 | "", /* 0x42 */
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| 49 | "", /* 0x43 */
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| 50 | "Digital Equipment Corporation", /* 0x44 */
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| 51 | "", "", "", "", "", "", "", "", "", "", /* 0x45 - 0x4e */
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| 52 | "", "", "", "", "", "", "", "", "", "", /* 0x4f - 0x58 */
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| 53 | "", "", "", "", "", "", "", "", "", "", /* 0x59 - 0x62 */
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| 54 | "", "", "", "", "", "", /* 0x63 - 0x68 */
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| 55 | "Intel Corporation" /* 0x69 */
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| 56 | };
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| 57 |
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| 58 | /** Length of the #imp_data array */
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[6c441cf8] | 59 | static unsigned int imp_data_length = sizeof(imp_data) / sizeof(char *);
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[6b781c0] | 60 |
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| 61 | /** Architecture names */
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| 62 | static char *arch_data[] = {
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| 63 | "?", /* 0x0 */
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| 64 | "4", /* 0x1 */
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| 65 | "4T", /* 0x2 */
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| 66 | "5", /* 0x3 */
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| 67 | "5T", /* 0x4 */
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| 68 | "5TE", /* 0x5 */
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| 69 | "5TEJ", /* 0x6 */
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| 70 | "6" /* 0x7 */
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| 71 | };
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| 72 |
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| 73 | /** Length of the #arch_data array */
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[6c441cf8] | 74 | static unsigned int arch_data_length = sizeof(arch_data) / sizeof(char *);
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[6b781c0] | 75 |
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| 76 |
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| 77 | /** Retrieves processor identification from CP15 register 0.
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| 78 | *
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| 79 | * @param cpu Structure for storing CPU identification.
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| 80 | */
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| 81 | static void arch_cpu_identify(cpu_arch_t *cpu)
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| 82 | {
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| 83 | uint32_t ident;
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| 84 | asm volatile (
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| 85 | "mrc p15, 0, %0, c0, c0, 0\n"
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| 86 | : "=r" (ident)
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| 87 | );
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| 88 |
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| 89 | cpu->imp_num = ident >> 24;
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| 90 | cpu->variant_num = (ident << 8) >> 28;
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| 91 | cpu->arch_num = (ident << 12) >> 28;
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| 92 | cpu->prim_part_num = (ident << 16) >> 20;
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| 93 | cpu->rev_num = (ident << 28) >> 28;
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| 94 | }
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| 95 |
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| 96 | /** Does nothing on ARM. */
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[d630139] | 97 | void cpu_arch_init(void)
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| 98 | {
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| 99 | }
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| 100 |
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[6b781c0] | 101 | /** Retrieves processor identification and stores it to #CPU.arch */
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| 102 | void cpu_identify(void)
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[d630139] | 103 | {
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[6b781c0] | 104 | arch_cpu_identify(&CPU->arch);
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[d630139] | 105 | }
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| 106 |
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[6b781c0] | 107 | /** Prints CPU identification. */
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[d630139] | 108 | void cpu_print_report(cpu_t *m)
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| 109 | {
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[6b781c0] | 110 | char * vendor = imp_data[0];
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| 111 | char * architecture = arch_data[0];
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| 112 | cpu_arch_t * cpu_arch = &m->arch;
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| 113 |
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| 114 | if ((cpu_arch->imp_num) > 0 &&
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| 115 | (cpu_arch->imp_num < (imp_data_length + IMP_DATA_START_OFFSET))) {
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| 116 | vendor = imp_data[cpu_arch->imp_num - IMP_DATA_START_OFFSET];
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| 117 | }
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| 118 |
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| 119 | if ((cpu_arch->arch_num) > 0 &&
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| 120 | (cpu_arch->arch_num < arch_data_length)) {
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| 121 | architecture = arch_data[cpu_arch->arch_num];
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| 122 | }
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| 123 |
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| 124 | printf("cpu%d: vendor=%s, architecture=ARM%s, part number=%x, "
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| 125 | "variant=%x, revision=%x\n",
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| 126 | m->id, vendor, architecture, cpu_arch->prim_part_num,
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| 127 | cpu_arch->variant_num, cpu_arch->rev_num);
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[d630139] | 128 | }
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| 129 |
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| 130 | /** @}
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| 131 | */
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