source: mainline/kernel/arch/arm32/include/mm/page.h@ 46a6a5d

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 46a6a5d was 5d9e36b, checked in by Jan Vesely <jano.vesely@…>, 13 years ago

arm32: Rename PROCESSOR macro to PROCESSOR_ARCH

We'll need PROCESSOR macro for MPU specific bits

  • Property mode set to 100644
File size: 4.9 KB
Line 
1/*
2 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup arm32mm
30 * @{
31 */
32/** @file
33 * @brief Paging related declarations.
34 */
35
36#ifndef KERN_arm32_PAGE_H_
37#define KERN_arm32_PAGE_H_
38
39#include <arch/mm/frame.h>
40#include <mm/mm.h>
41#include <arch/exception.h>
42#include <arch/barrier.h>
43#include <trace.h>
44
45#define PAGE_WIDTH FRAME_WIDTH
46#define PAGE_SIZE FRAME_SIZE
47
48#ifdef MACHINE_beagleboardxm
49#ifndef __ASM__
50# define KA2PA(x) ((uintptr_t) (x))
51# define PA2KA(x) ((uintptr_t) (x))
52#else
53# define KA2PA(x) (x)
54# define PA2KA(x) (x)
55#endif
56#else
57#ifndef __ASM__
58# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
59# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
60#else
61# define KA2PA(x) ((x) - 0x80000000)
62# define PA2KA(x) ((x) + 0x80000000)
63#endif
64#endif
65
66/* Number of entries in each level. */
67#define PTL0_ENTRIES_ARCH (1 << 12) /* 4096 */
68#define PTL1_ENTRIES_ARCH 0
69#define PTL2_ENTRIES_ARCH 0
70/* coarse page tables used (256 * 4 = 1KB per page) */
71#define PTL3_ENTRIES_ARCH (1 << 8) /* 256 */
72
73/* Page table sizes for each level. */
74#define PTL0_SIZE_ARCH FOUR_FRAMES
75#define PTL1_SIZE_ARCH 0
76#define PTL2_SIZE_ARCH 0
77#define PTL3_SIZE_ARCH ONE_FRAME
78
79/* Macros calculating indices into page tables for each level. */
80#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 20) & 0xfff)
81#define PTL1_INDEX_ARCH(vaddr) 0
82#define PTL2_INDEX_ARCH(vaddr) 0
83#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x0ff)
84
85/* Get PTE address accessors for each level. */
86#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \
87 ((pte_t *) ((((pte_t *)(ptl0))[(i)].l0).coarse_table_addr << 10))
88#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \
89 (ptl1)
90#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \
91 (ptl2)
92#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \
93 ((uintptr_t) ((((pte_t *)(ptl3))[(i)].l1).frame_base_addr << 12))
94
95/* Set PTE address accessors for each level. */
96#define SET_PTL0_ADDRESS_ARCH(ptl0) \
97 (set_ptl0_addr((pte_t *) (ptl0)))
98#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \
99 (((pte_t *) (ptl0))[(i)].l0.coarse_table_addr = (a) >> 10)
100#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
101#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
102#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \
103 (((pte_t *) (ptl3))[(i)].l1.frame_base_addr = (a) >> 12)
104
105/* Get PTE flags accessors for each level. */
106#define GET_PTL1_FLAGS_ARCH(ptl0, i) \
107 get_pt_level0_flags((pte_t *) (ptl0), (size_t) (i))
108#define GET_PTL2_FLAGS_ARCH(ptl1, i) \
109 PAGE_PRESENT
110#define GET_PTL3_FLAGS_ARCH(ptl2, i) \
111 PAGE_PRESENT
112#define GET_FRAME_FLAGS_ARCH(ptl3, i) \
113 get_pt_level1_flags((pte_t *) (ptl3), (size_t) (i))
114
115/* Set PTE flags accessors for each level. */
116#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \
117 set_pt_level0_flags((pte_t *) (ptl0), (size_t) (i), (x))
118#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
119#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
120#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \
121 set_pt_level1_flags((pte_t *) (ptl3), (size_t) (i), (x))
122
123/* Set PTE present bit accessors for each level. */
124#define SET_PTL1_PRESENT_ARCH(ptl0, i) \
125 set_pt_level0_present((pte_t *) (ptl0), (size_t) (i))
126#define SET_PTL2_PRESENT_ARCH(ptl1, i)
127#define SET_PTL3_PRESENT_ARCH(ptl2, i)
128#define SET_FRAME_PRESENT_ARCH(ptl3, i) \
129 set_pt_level1_present((pte_t *) (ptl3), (size_t) (i))
130
131#if defined(PROCESSOR_ARCH_armv6) | defined(PROCESSOR_ARCH_armv7_a)
132#include "page_armv6.h"
133#elif defined(PROCESSOR_ARCH_armv4) | defined(PROCESSOR_ARCH_armv5)
134#include "page_armv4.h"
135#else
136#error "Unsupported architecture"
137#endif
138
139#endif
140
141/** @}
142 */
Note: See TracBrowser for help on using the repository browser.