| 1 | /*
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| 2 | * Copyright (c) 2007 Michal Kebrt
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup arm32
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * @brief Count of CPU cycles.
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| 34 | */
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| 35 |
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| 36 | #ifndef KERN_arm32_CYCLE_H_
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| 37 | #define KERN_arm32_CYCLE_H_
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| 38 |
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| 39 | #include <trace.h>
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| 40 | #include <arch/cp15.h>
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| 41 |
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| 42 | /** Return count of CPU cycles.
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| 43 | *
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| 44 | * No such instruction on ARM to get count of cycles.
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| 45 | *
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| 46 | * @return Count of CPU cycles.
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| 47 | *
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| 48 | */
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| 49 | NO_TRACE static inline uint64_t get_cycle(void)
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| 50 | {
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| 51 | #ifdef PROCESSOR_ARCH_armv7_a
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| 52 | if ((ID_PFR1_read() & ID_PFR1_GEN_TIMER_EXT_MASK) ==
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| 53 | ID_PFR1_GEN_TIMER_EXT) {
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| 54 | uint32_t low = 0, high = 0;
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| 55 | asm volatile( "MRRC p15, 0, %[low], %[high], c14": [low]"=r"(low), [high]"=r"(high));
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| 56 | return ((uint64_t)high << 32) | low;
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| 57 | } else {
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| 58 | return (uint64_t)PMCCNTR_read() * 64;
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| 59 | }
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| 60 | #endif
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| 61 | return 0;
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| 62 | }
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| 63 |
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| 64 | #endif
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| 65 |
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| 66 | /** @}
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| 67 | */
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