source: mainline/kernel/arch/amd64/src/mm/page.c@ a1f60f3

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since a1f60f3 was a1f60f3, checked in by Martin Decky <martin@…>, 15 years ago

move from "kernel" memory model to "large" memory model
get rid of the extra identity mapping of the physical memory at -2 GB
  • Property mode set to 100644
File size: 6.8 KB
Line 
1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup amd64mm
30 * @{
31 */
32/** @file
33 */
34
35#include <arch/mm/page.h>
36#include <genarch/mm/page_pt.h>
37#include <arch/mm/frame.h>
38#include <mm/page.h>
39#include <mm/frame.h>
40#include <mm/as.h>
41#include <arch/interrupt.h>
42#include <arch/asm.h>
43#include <config.h>
44#include <memstr.h>
45#include <interrupt.h>
46#include <print.h>
47#include <panic.h>
48#include <align.h>
49
50/* Definitions for identity page mapper */
51pte_t helper_ptl1[512] __attribute__((aligned (PAGE_SIZE)));
52pte_t helper_ptl2[512] __attribute__((aligned (PAGE_SIZE)));
53pte_t helper_ptl3[512] __attribute__((aligned (PAGE_SIZE)));
54
55static uintptr_t oldpage = 0;
56
57extern pte_t ptl_0; /* From boot.S */
58
59#define PTL1_PRESENT(ptl0, page) \
60 (!(GET_PTL1_FLAGS_ARCH(ptl0, PTL0_INDEX_ARCH(page)) & PAGE_NOT_PRESENT))
61
62#define PTL2_PRESENT(ptl1, page) \
63 (!(GET_PTL2_FLAGS_ARCH(ptl1, PTL1_INDEX_ARCH(page)) & PAGE_NOT_PRESENT))
64
65#define PTL3_PRESENT(ptl2, page) \
66 (!(GET_PTL3_FLAGS_ARCH(ptl2, PTL2_INDEX_ARCH(page)) & PAGE_NOT_PRESENT))
67
68#define PTL1_ADDR(ptl0, page) \
69 ((pte_t *) PA2KA(GET_PTL1_ADDRESS_ARCH(ptl0, PTL0_INDEX_ARCH(page))))
70
71#define PTL2_ADDR(ptl1, page) \
72 ((pte_t *) PA2KA(GET_PTL2_ADDRESS_ARCH(ptl1, PTL1_INDEX_ARCH(page))))
73
74#define PTL3_ADDR(ptl2, page) \
75 ((pte_t *) PA2KA(GET_PTL3_ADDRESS_ARCH(ptl2, PTL2_INDEX_ARCH(page))))
76
77#define SETUP_PTL1(ptl0, page, tgt) \
78 { \
79 SET_PTL1_ADDRESS_ARCH(ptl0, PTL0_INDEX_ARCH(page), (uintptr_t)KA2PA(tgt)); \
80 SET_PTL1_FLAGS_ARCH(ptl0, PTL0_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
81 }
82
83#define SETUP_PTL2(ptl1, page, tgt) \
84 { \
85 SET_PTL2_ADDRESS_ARCH(ptl1, PTL1_INDEX_ARCH(page), (uintptr_t)KA2PA(tgt)); \
86 SET_PTL2_FLAGS_ARCH(ptl1, PTL1_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
87 }
88
89#define SETUP_PTL3(ptl2, page, tgt) \
90 { \
91 SET_PTL3_ADDRESS_ARCH(ptl2, PTL2_INDEX_ARCH(page), (uintptr_t)KA2PA(tgt)); \
92 SET_PTL3_FLAGS_ARCH(ptl2, PTL2_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
93 }
94
95#define SETUP_FRAME(ptl3, page, tgt) \
96 { \
97 SET_FRAME_ADDRESS_ARCH(ptl3, PTL3_INDEX_ARCH(page), (uintptr_t)KA2PA(tgt)); \
98 SET_FRAME_FLAGS_ARCH(ptl3, PTL3_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
99 }
100
101void page_arch_init(void)
102{
103 if (config.cpu_active == 1) {
104 uintptr_t cur;
105 unsigned int identity_flags =
106 PAGE_CACHEABLE | PAGE_EXEC | PAGE_GLOBAL | PAGE_WRITE;
107
108 page_mapping_operations = &pt_mapping_operations;
109
110 page_table_lock(AS_KERNEL, true);
111
112 /*
113 * PA2KA(identity) mapping for all frames.
114 */
115 for (cur = 0; cur < last_frame; cur += FRAME_SIZE)
116 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, identity_flags);
117
118 page_table_unlock(AS_KERNEL, true);
119
120 exc_register(14, "page_fault", true, (iroutine_t) page_fault);
121 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
122 } else
123 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
124}
125
126/** Identity page mapper
127 *
128 * We need to map whole physical memory identically before the page subsystem
129 * is initializaed. This thing clears page table and fills in the specific
130 * items.
131 *
132 */
133void ident_page_fault(unsigned int n, istate_t *istate)
134{
135 pte_t *aptl_1;
136 pte_t *aptl_2;
137 pte_t *aptl_3;
138
139 uintptr_t page = read_cr2();
140
141 /* Unmap old address */
142 if (oldpage) {
143 pte_t *aptl_1 = PTL1_ADDR(&ptl_0, oldpage);
144 pte_t *aptl_2 = PTL2_ADDR(aptl_1, oldpage);
145 pte_t *aptl_3 = PTL3_ADDR(aptl_2, oldpage);
146
147 SET_FRAME_FLAGS_ARCH(aptl_3, PTL3_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
148
149 if (KA2PA(aptl_3) == KA2PA(helper_ptl3))
150 SET_PTL3_FLAGS_ARCH(aptl_2, PTL2_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
151
152 if (KA2PA(aptl_2) == KA2PA(helper_ptl2))
153 SET_PTL2_FLAGS_ARCH(aptl_1, PTL1_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
154
155 if (KA2PA(aptl_1) == KA2PA(helper_ptl1))
156 SET_PTL1_FLAGS_ARCH(&ptl_0, PTL0_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
157 }
158
159 if (PTL1_PRESENT(&ptl_0, page))
160 aptl_1 = PTL1_ADDR(&ptl_0, page);
161 else {
162 SETUP_PTL1(&ptl_0, page, helper_ptl1);
163 aptl_1 = helper_ptl1;
164 }
165
166 if (PTL2_PRESENT(aptl_1, page))
167 aptl_2 = PTL2_ADDR(aptl_1, page);
168 else {
169 SETUP_PTL2(aptl_1, page, helper_ptl2);
170 aptl_2 = helper_ptl2;
171 }
172
173 if (PTL3_PRESENT(aptl_2, page))
174 aptl_3 = PTL3_ADDR(aptl_2, page);
175 else {
176 SETUP_PTL3(aptl_2, page, helper_ptl3);
177 aptl_3 = helper_ptl3;
178 }
179
180 SETUP_FRAME(aptl_3, page, page);
181
182 oldpage = page;
183}
184
185void page_fault(unsigned int n, istate_t *istate)
186{
187 uintptr_t page = read_cr2();
188
189 if (istate->error_word & PFERR_CODE_RSVD)
190 panic("Reserved bit set in page table entry.");
191
192 pf_access_t access;
193
194 if (istate->error_word & PFERR_CODE_RW)
195 access = PF_ACCESS_WRITE;
196 else if (istate->error_word & PFERR_CODE_ID)
197 access = PF_ACCESS_EXEC;
198 else
199 access = PF_ACCESS_READ;
200
201 if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
202 fault_if_from_uspace(istate, "Page fault: %p.", page);
203 decode_istate(n, istate);
204 panic("Page fault: %p", page);
205 }
206}
207
208uintptr_t hw_map(uintptr_t physaddr, size_t size)
209{
210 if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
211 panic("Unable to map physical memory %p (%" PRIs " bytes).", physaddr,
212 size);
213
214 uintptr_t virtaddr = PA2KA(last_frame);
215 pfn_t i;
216
217 page_table_lock(AS_KERNEL, true);
218
219 for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
220 page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE | PAGE_WRITE);
221
222 page_table_unlock(AS_KERNEL, true);
223
224 last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
225
226 return virtaddr;
227}
228
229/** @}
230 */
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