source: mainline/kernel/arch/amd64/src/mm/page.c@ 691eb52

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 691eb52 was 9979acb, checked in by Martin Decky <martin@…>, 17 years ago

make hw_area API more generic
this allows mapping of EGA VRAM on ia32/amd64
  • Property mode set to 100644
File size: 7.7 KB
Line 
1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup amd64mm
30 * @{
31 */
32/** @file
33 */
34
35#include <arch/mm/page.h>
36#include <genarch/mm/page_pt.h>
37#include <genarch/drivers/ega/ega.h>
38#include <genarch/drivers/legacy/ia32/io.h>
39#include <arch/mm/frame.h>
40#include <mm/page.h>
41#include <mm/frame.h>
42#include <mm/as.h>
43#include <arch/interrupt.h>
44#include <arch/asm.h>
45#include <config.h>
46#include <memstr.h>
47#include <interrupt.h>
48#include <print.h>
49#include <panic.h>
50#include <align.h>
51#include <ddi/ddi.h>
52
53/** Physical memory area for devices. */
54static parea_t dev_area;
55static parea_t ega_area;
56
57/* Definitions for identity page mapper */
58pte_t helper_ptl1[512] __attribute__((aligned (PAGE_SIZE)));
59pte_t helper_ptl2[512] __attribute__((aligned (PAGE_SIZE)));
60pte_t helper_ptl3[512] __attribute__((aligned (PAGE_SIZE)));
61extern pte_t ptl_0; /* From boot.S */
62
63#define PTL1_PRESENT(ptl0, page) (!(GET_PTL1_FLAGS_ARCH(ptl0, PTL0_INDEX_ARCH(page)) & PAGE_NOT_PRESENT))
64#define PTL2_PRESENT(ptl1, page) (!(GET_PTL2_FLAGS_ARCH(ptl1, PTL1_INDEX_ARCH(page)) & PAGE_NOT_PRESENT))
65#define PTL3_PRESENT(ptl2, page) (!(GET_PTL3_FLAGS_ARCH(ptl2, PTL2_INDEX_ARCH(page)) & PAGE_NOT_PRESENT))
66
67#define PTL1_ADDR(ptl0, page) ((pte_t *)PA2KA(GET_PTL1_ADDRESS_ARCH(ptl0, PTL0_INDEX_ARCH(page))))
68#define PTL2_ADDR(ptl1, page) ((pte_t *)PA2KA(GET_PTL2_ADDRESS_ARCH(ptl1, PTL1_INDEX_ARCH(page))))
69#define PTL3_ADDR(ptl2, page) ((pte_t *)PA2KA(GET_PTL3_ADDRESS_ARCH(ptl2, PTL2_INDEX_ARCH(page))))
70
71#define SETUP_PTL1(ptl0, page, tgt) { \
72 SET_PTL1_ADDRESS_ARCH(ptl0, PTL0_INDEX_ARCH(page), (uintptr_t)KA2PA(tgt)); \
73 SET_PTL1_FLAGS_ARCH(ptl0, PTL0_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
74 }
75#define SETUP_PTL2(ptl1, page, tgt) { \
76 SET_PTL2_ADDRESS_ARCH(ptl1, PTL1_INDEX_ARCH(page), (uintptr_t)KA2PA(tgt)); \
77 SET_PTL2_FLAGS_ARCH(ptl1, PTL1_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
78 }
79#define SETUP_PTL3(ptl2, page, tgt) { \
80 SET_PTL3_ADDRESS_ARCH(ptl2, PTL2_INDEX_ARCH(page), (uintptr_t)KA2PA(tgt)); \
81 SET_PTL3_FLAGS_ARCH(ptl2, PTL2_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
82 }
83#define SETUP_FRAME(ptl3, page, tgt) { \
84 SET_FRAME_ADDRESS_ARCH(ptl3, PTL3_INDEX_ARCH(page), (uintptr_t)KA2PA(tgt)); \
85 SET_FRAME_FLAGS_ARCH(ptl3, PTL3_INDEX_ARCH(page), PAGE_WRITE | PAGE_EXEC); \
86 }
87
88
89void page_arch_init(void)
90{
91 uintptr_t cur;
92 unsigned int i;
93 int identity_flags = PAGE_CACHEABLE | PAGE_EXEC | PAGE_GLOBAL | PAGE_WRITE;
94
95 if (config.cpu_active == 1) {
96 page_mapping_operations = &pt_mapping_operations;
97
98 /*
99 * PA2KA(identity) mapping for all frames.
100 */
101 for (cur = 0; cur < last_frame; cur += FRAME_SIZE) {
102 /* Standard identity mapping */
103 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, identity_flags);
104 }
105
106 /* Upper kernel mapping
107 * - from zero to top of kernel (include bottom addresses
108 * because some are needed for init)
109 */
110 for (cur = PA2KA_CODE(0); cur < config.base + config.kernel_size; cur += FRAME_SIZE)
111 page_mapping_insert(AS_KERNEL, cur, KA2PA(cur), identity_flags);
112
113 for (cur = config.stack_base; cur < config.stack_base + config.stack_size; cur += FRAME_SIZE)
114 page_mapping_insert(AS_KERNEL, cur, KA2PA(cur), identity_flags);
115
116 for (i = 0; i < init.cnt; i++) {
117 for (cur = init.tasks[i].addr; cur < init.tasks[i].addr + init.tasks[i].size; cur += FRAME_SIZE)
118 page_mapping_insert(AS_KERNEL, PA2KA_CODE(KA2PA(cur)), KA2PA(cur), identity_flags);
119 }
120
121 exc_register(14, "page_fault", (iroutine) page_fault);
122 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
123 } else
124 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
125}
126
127
128/** Identity page mapper
129 *
130 * We need to map whole physical memory identically before the page subsystem
131 * is initializaed. This thing clears page table and fills in the specific
132 * items.
133 */
134void ident_page_fault(int n, istate_t *istate)
135{
136 uintptr_t page;
137 static uintptr_t oldpage = 0;
138 pte_t *aptl_1, *aptl_2, *aptl_3;
139
140 page = read_cr2();
141 if (oldpage) {
142 /* Unmap old address */
143 aptl_1 = PTL1_ADDR(&ptl_0, oldpage);
144 aptl_2 = PTL2_ADDR(aptl_1, oldpage);
145 aptl_3 = PTL3_ADDR(aptl_2, oldpage);
146
147 SET_FRAME_FLAGS_ARCH(aptl_3, PTL3_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
148 if (KA2PA(aptl_3) == KA2PA(helper_ptl3))
149 SET_PTL3_FLAGS_ARCH(aptl_2, PTL2_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
150 if (KA2PA(aptl_2) == KA2PA(helper_ptl2))
151 SET_PTL2_FLAGS_ARCH(aptl_1, PTL1_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
152 if (KA2PA(aptl_1) == KA2PA(helper_ptl1))
153 SET_PTL1_FLAGS_ARCH(&ptl_0, PTL0_INDEX_ARCH(oldpage), PAGE_NOT_PRESENT);
154 }
155 if (PTL1_PRESENT(&ptl_0, page))
156 aptl_1 = PTL1_ADDR(&ptl_0, page);
157 else {
158 SETUP_PTL1(&ptl_0, page, helper_ptl1);
159 aptl_1 = helper_ptl1;
160 }
161
162 if (PTL2_PRESENT(aptl_1, page))
163 aptl_2 = PTL2_ADDR(aptl_1, page);
164 else {
165 SETUP_PTL2(aptl_1, page, helper_ptl2);
166 aptl_2 = helper_ptl2;
167 }
168
169 if (PTL3_PRESENT(aptl_2, page))
170 aptl_3 = PTL3_ADDR(aptl_2, page);
171 else {
172 SETUP_PTL3(aptl_2, page, helper_ptl3);
173 aptl_3 = helper_ptl3;
174 }
175
176 SETUP_FRAME(aptl_3, page, page);
177
178 oldpage = page;
179}
180
181
182void page_fault(int n, istate_t *istate)
183{
184 uintptr_t page;
185 pf_access_t access;
186
187 page = read_cr2();
188
189 if (istate->error_word & PFERR_CODE_RSVD)
190 panic("Reserved bit set in page table entry.");
191
192 if (istate->error_word & PFERR_CODE_RW)
193 access = PF_ACCESS_WRITE;
194 else if (istate->error_word & PFERR_CODE_ID)
195 access = PF_ACCESS_EXEC;
196 else
197 access = PF_ACCESS_READ;
198
199 if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
200 fault_if_from_uspace(istate, "Page fault: %#x.", page);
201
202 decode_istate(n, istate);
203 printf("Page fault address: %llx.\n", page);
204 panic("Page fault.");
205 }
206}
207
208
209uintptr_t hw_map(uintptr_t physaddr, size_t size)
210{
211 if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
212 panic("Unable to map physical memory %p (%d bytes).", physaddr, size)
213
214 uintptr_t virtaddr = PA2KA(last_frame);
215 pfn_t i;
216 for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
217 page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE | PAGE_WRITE);
218
219 last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
220
221 return virtaddr;
222}
223
224void hw_area(void)
225{
226 dev_area.pbase = end_frame;
227 dev_area.frames = SIZE2FRAMES(0xfffffffffffff - end_frame);
228 ddi_parea_register(&dev_area);
229
230 ega_area.pbase = EGA_VIDEORAM;
231 ega_area.frames = SIZE2FRAMES(EGA_VRAM_SIZE);
232 ddi_parea_register(&ega_area);
233}
234
235/** @}
236 */
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