source: mainline/kernel/arch/amd64/src/mm/page.c@ 202f57b

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 202f57b was c15b374, checked in by Jakub Jermar <jakub@…>, 15 years ago

Introduce PF_ACCESS_UNKNOWN to be used by the debuging/panicking code in
situations in which the trap handler does not know the exact access type.

Do not pass context-specific messages of only minimal information value to
panic_memtrap().

  • Property mode set to 100644
File size: 3.6 KB
RevLine 
[1141c1a]1/*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[1141c1a]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[06e1e95]29/** @addtogroup amd64mm
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[95498e5]35#include <arch/mm/page.h>
[6d7ffa65]36#include <genarch/mm/page_pt.h>
[95498e5]37#include <arch/mm/frame.h>
[d9f81af3]38#include <mm/page.h>
[db3341e]39#include <mm/frame.h>
[fc1e4f6]40#include <mm/as.h>
[db3341e]41#include <arch/asm.h>
42#include <config.h>
43#include <memstr.h>
[fcfac420]44#include <interrupt.h>
[1ee9ced]45#include <print.h>
46#include <panic.h>
[93165be]47#include <align.h>
[1ee9ced]48
[d9f81af3]49void page_arch_init(void)
50{
[db3341e]51 if (config.cpu_active == 1) {
[a1f60f3]52 uintptr_t cur;
53 unsigned int identity_flags =
54 PAGE_CACHEABLE | PAGE_EXEC | PAGE_GLOBAL | PAGE_WRITE;
55
[f5935ed]56 page_mapping_operations = &pt_mapping_operations;
[a1f60f3]57
[b0b2ac1]58 page_table_lock(AS_KERNEL, true);
[a1f60f3]59
[db3341e]60 /*
61 * PA2KA(identity) mapping for all frames.
62 */
[a1f60f3]63 for (cur = 0; cur < last_frame; cur += FRAME_SIZE)
[5fceec7]64 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, identity_flags);
[4cc2ddd]65
[b0b2ac1]66 page_table_unlock(AS_KERNEL, true);
[a1f60f3]67
[b3b7e14a]68 exc_register(14, "page_fault", true, (iroutine_t) page_fault);
[80bcaed]69 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
[b3b7e14a]70 } else
[80bcaed]71 write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
[d9f81af3]72}
[1ee9ced]73
[214ec25c]74void page_fault(unsigned int n, istate_t *istate)
[1ee9ced]75{
[a1f60f3]76 uintptr_t page = read_cr2();
[567807b1]77
78 if (istate->error_word & PFERR_CODE_RSVD)
[f651e80]79 panic("Reserved bit set in page table entry.");
[567807b1]80
[a1f60f3]81 pf_access_t access;
82
[567807b1]83 if (istate->error_word & PFERR_CODE_RW)
84 access = PF_ACCESS_WRITE;
85 else if (istate->error_word & PFERR_CODE_ID)
86 access = PF_ACCESS_EXEC;
87 else
88 access = PF_ACCESS_READ;
89
90 if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
[f651e80]91 fault_if_from_uspace(istate, "Page fault: %#x.", page);
[c15b374]92 panic_memtrap(istate, access, page, NULL);
[1ee9ced]93 }
94}
[c1982e45]95
[7f1c620]96uintptr_t hw_map(uintptr_t physaddr, size_t size)
[c1982e45]97{
98 if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
[a1f60f3]99 panic("Unable to map physical memory %p (%" PRIs " bytes).", physaddr,
[fabc883]100 size);
[c1982e45]101
[7f1c620]102 uintptr_t virtaddr = PA2KA(last_frame);
[c1982e45]103 pfn_t i;
[a1f60f3]104
[b0b2ac1]105 page_table_lock(AS_KERNEL, true);
[a1f60f3]106
[c1982e45]107 for (i = 0; i < ADDR2PFN(ALIGN_UP(size, PAGE_SIZE)); i++)
[7cb567cd]108 page_mapping_insert(AS_KERNEL, virtaddr + PFN2ADDR(i), physaddr + PFN2ADDR(i), PAGE_NOT_CACHEABLE | PAGE_WRITE);
[a1f60f3]109
[b0b2ac1]110 page_table_unlock(AS_KERNEL, true);
[c1982e45]111
112 last_frame = ALIGN_UP(last_frame + size, FRAME_SIZE);
113
114 return virtaddr;
115}
[b45c443]116
[06e1e95]117/** @}
[b45c443]118 */
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