source: mainline/kernel/arch/amd64/src/interrupt.c@ e3038b4

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since e3038b4 was e3038b4, checked in by Jakub Jermar <jakub@…>, 15 years ago

Merge unified panic architecture (Phase 1).

Note that this is still work in progress as there are the following sharp edges:

  • imprecise detection of read/write accesses on some architectures
  • missing or imperfect capability to print stack traces on some architectures
  • istate_t on some architectures may contain too little valuable information
  • basically all trap frames need to be reorganized to look like a normal stack frame on the stack trace so that there are no missing frames
  • panic_common() could print more information about the current context such as the task name, thread name, ASID etc.
  • functions that call panic_*() should be protected against inlining to avoid missing or confusing stack frames in the stack trace
  • Property mode set to 100644
File size: 5.9 KB
Line 
1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup amd64interrupt
30 * @{
31 */
32/** @file
33 */
34
35#include <arch/interrupt.h>
36#include <print.h>
37#include <debug.h>
38#include <panic.h>
39#include <arch/drivers/i8259.h>
40#include <func.h>
41#include <cpu.h>
42#include <arch/asm.h>
43#include <mm/tlb.h>
44#include <mm/as.h>
45#include <arch.h>
46#include <arch/asm.h>
47#include <proc/scheduler.h>
48#include <proc/thread.h>
49#include <proc/task.h>
50#include <synch/spinlock.h>
51#include <arch/ddi/ddi.h>
52#include <interrupt.h>
53#include <ddi/irq.h>
54#include <symtab.h>
55#include <stacktrace.h>
56
57/*
58 * Interrupt and exception dispatching.
59 */
60
61void (* disable_irqs_function)(uint16_t irqmask) = NULL;
62void (* enable_irqs_function)(uint16_t irqmask) = NULL;
63void (* eoi_function)(void) = NULL;
64
65void istate_decode(istate_t *istate)
66{
67 printf("error_word=%#llx\n", istate->error_word);
68 printf("cs =%#0.16llx\trflags=%#0.16llx\n", istate->cs,
69 istate->rflags);
70 printf("rax=%#0.16llx\trbx=%#0.16llx\trcx=%#0.16llx\n", istate->rax,
71 istate->rcx, istate->rdx);
72 printf("rsi=%#0.16llx\trdi=%#0.16llx\tr8 =%#0.16llx\n", istate->rsi,
73 istate->rdi, istate->r8);
74 printf("r9 =%#0.16llx\tr10=%#0.16llx\tr11=%#0.16llx\n", istate->r9,
75 istate->r10, istate->r11);
76}
77
78static void trap_virtual_eoi(void)
79{
80 if (eoi_function)
81 eoi_function();
82 else
83 panic("No eoi_function.");
84
85}
86
87static void null_interrupt(unsigned int n, istate_t *istate)
88{
89 fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
90 panic_badtrap(istate, n, "Unserviced interrupt.");
91}
92
93static void de_fault(unsigned int n, istate_t *istate)
94{
95 fault_if_from_uspace(istate, "Divide error.");
96 panic_badtrap(istate, n, "Divide error.");
97}
98
99/** General Protection Fault.
100 *
101 */
102static void gp_fault(unsigned int n, istate_t *istate)
103{
104 if (TASK) {
105 irq_spinlock_lock(&TASK->lock, false);
106 size_t ver = TASK->arch.iomapver;
107 irq_spinlock_unlock(&TASK->lock, false);
108
109 if (CPU->arch.iomapver_copy != ver) {
110 /*
111 * This fault can be caused by an early access
112 * to I/O port because of an out-dated
113 * I/O Permission bitmap installed on CPU.
114 * Install the fresh copy and restart
115 * the instruction.
116 */
117 io_perm_bitmap_install();
118 return;
119 }
120 fault_if_from_uspace(istate, "General protection fault.");
121 }
122 panic_badtrap(istate, n, "General protection fault.");
123}
124
125static void ss_fault(unsigned int n, istate_t *istate)
126{
127 fault_if_from_uspace(istate, "Stack fault.");
128 panic_badtrap(istate, n, "Stack fault.");
129}
130
131static void nm_fault(unsigned int n, istate_t *istate)
132{
133#ifdef CONFIG_FPU_LAZY
134 scheduler_fpu_lazy_request();
135#else
136 fault_if_from_uspace(istate, "FPU fault.");
137 panic("FPU fault.");
138#endif
139}
140
141#ifdef CONFIG_SMP
142static void tlb_shootdown_ipi(unsigned int n, istate_t *istate)
143{
144 trap_virtual_eoi();
145 tlb_shootdown_ipi_recv();
146}
147#endif
148
149/** Handler of IRQ exceptions.
150 *
151 */
152static void irq_interrupt(unsigned int n, istate_t *istate)
153{
154 ASSERT(n >= IVT_IRQBASE);
155
156 unsigned int inum = n - IVT_IRQBASE;
157 bool ack = false;
158 ASSERT(inum < IRQ_COUNT);
159 ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
160
161 irq_t *irq = irq_dispatch_and_lock(inum);
162 if (irq) {
163 /*
164 * The IRQ handler was found.
165 */
166
167 if (irq->preack) {
168 /* Send EOI before processing the interrupt */
169 trap_virtual_eoi();
170 ack = true;
171 }
172 irq->handler(irq);
173 irq_spinlock_unlock(&irq->lock, false);
174 } else {
175 /*
176 * Spurious interrupt.
177 */
178#ifdef CONFIG_DEBUG
179 printf("cpu%u: spurious interrupt (inum=%u)\n", CPU->id, inum);
180#endif
181 }
182
183 if (!ack)
184 trap_virtual_eoi();
185}
186
187void interrupt_init(void)
188{
189 unsigned int i;
190
191 for (i = 0; i < IVT_ITEMS; i++)
192 exc_register(i, "null", false, (iroutine_t) null_interrupt);
193
194 for (i = 0; i < IRQ_COUNT; i++) {
195 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
196 exc_register(IVT_IRQBASE + i, "irq", true,
197 (iroutine_t) irq_interrupt);
198 }
199
200 exc_register(0, "de_fault", true, (iroutine_t) de_fault);
201 exc_register(7, "nm_fault", true, (iroutine_t) nm_fault);
202 exc_register(12, "ss_fault", true, (iroutine_t) ss_fault);
203 exc_register(13, "gp_fault", true, (iroutine_t) gp_fault);
204
205#ifdef CONFIG_SMP
206 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
207 (iroutine_t) tlb_shootdown_ipi);
208#endif
209}
210
211void trap_virtual_enable_irqs(uint16_t irqmask)
212{
213 if (enable_irqs_function)
214 enable_irqs_function(irqmask);
215 else
216 panic("No enable_irqs_function.");
217}
218
219void trap_virtual_disable_irqs(uint16_t irqmask)
220{
221 if (disable_irqs_function)
222 disable_irqs_function(irqmask);
223 else
224 panic("No disable_irqs_function.");
225}
226
227/** @}
228 */
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