source: mainline/kernel/arch/amd64/src/interrupt.c@ da1bafb

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since da1bafb was da1bafb, checked in by Martin Decky <martin@…>, 15 years ago

major code revision

  • replace spinlocks taken with interrupts disabled with irq_spinlocks
  • change spacing (not indendation) to be tab-size independent
  • use unsigned integer types where appropriate (especially bit flags)
  • visual separation
  • remove argument names in function prototypes
  • string changes
  • correct some formating directives
  • replace various cryptic single-character variables (t, a, m, c, b, etc.) with proper identifiers (thread, task, timeout, as, itm, itc, etc.)
  • unify some assembler constructs
  • unused page table levels are now optimized out in compile time
  • replace several ints (with boolean semantics) with bools
  • use specifically sized types instead of generic types where appropriate (size_t, uint32_t, btree_key_t)
  • improve comments
  • split asserts with conjuction into multiple independent asserts
  • Property mode set to 100644
File size: 6.1 KB
Line 
1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup amd64interrupt
30 * @{
31 */
32/** @file
33 */
34
35#include <arch/interrupt.h>
36#include <print.h>
37#include <debug.h>
38#include <panic.h>
39#include <arch/drivers/i8259.h>
40#include <func.h>
41#include <cpu.h>
42#include <arch/asm.h>
43#include <mm/tlb.h>
44#include <mm/as.h>
45#include <arch.h>
46#include <arch/asm.h>
47#include <proc/scheduler.h>
48#include <proc/thread.h>
49#include <proc/task.h>
50#include <synch/spinlock.h>
51#include <arch/ddi/ddi.h>
52#include <interrupt.h>
53#include <ddi/irq.h>
54#include <symtab.h>
55#include <stacktrace.h>
56
57/*
58 * Interrupt and exception dispatching.
59 */
60
61void (* disable_irqs_function)(uint16_t irqmask) = NULL;
62void (* enable_irqs_function)(uint16_t irqmask) = NULL;
63void (* eoi_function)(void) = NULL;
64
65void decode_istate(int n, istate_t *istate)
66{
67 const char *symbol = symtab_fmt_name_lookup(istate->rip);
68
69 printf("-----EXCEPTION(%d) OCCURED----- ( %s )\n", n, __func__);
70 printf("%%rip: %#llx (%s)\n", istate->rip, symbol);
71 printf("ERROR_WORD=%#llx\n", istate->error_word);
72 printf("%%cs=%#llx, rflags=%#llx, %%cr0=%#llx\n", istate->cs,
73 istate->rflags, read_cr0());
74 printf("%%rax=%#llx, %%rcx=%#llx, %%rdx=%#llx\n", istate->rax,
75 istate->rcx, istate->rdx);
76 printf("%%rsi=%#llx, %%rdi=%#llx, %%r8=%#llx\n", istate->rsi,
77 istate->rdi, istate->r8);
78 printf("%%r9=%#llx, %%r10=%#llx, %%r11=%#llx\n", istate->r9,
79 istate->r10, istate->r11);
80 printf("%%rsp=%#llx\n", &istate->stack[0]);
81
82 stack_trace_istate(istate);
83}
84
85static void trap_virtual_eoi(void)
86{
87 if (eoi_function)
88 eoi_function();
89 else
90 panic("No eoi_function.");
91
92}
93
94static void null_interrupt(int n, istate_t *istate)
95{
96 fault_if_from_uspace(istate, "Unserviced interrupt: %d.", n);
97 decode_istate(n, istate);
98 panic("Unserviced interrupt.");
99}
100
101static void de_fault(int n, istate_t *istate)
102{
103 fault_if_from_uspace(istate, "Divide error.");
104 decode_istate(n, istate);
105 panic("Divide error.");
106}
107
108/** General Protection Fault.
109 *
110 */
111static void gp_fault(int n, istate_t *istate)
112{
113 if (TASK) {
114 irq_spinlock_lock(&TASK->lock, false);
115 size_t ver = TASK->arch.iomapver;
116 irq_spinlock_unlock(&TASK->lock, false);
117
118 if (CPU->arch.iomapver_copy != ver) {
119 /*
120 * This fault can be caused by an early access
121 * to I/O port because of an out-dated
122 * I/O Permission bitmap installed on CPU.
123 * Install the fresh copy and restart
124 * the instruction.
125 */
126 io_perm_bitmap_install();
127 return;
128 }
129 fault_if_from_uspace(istate, "General protection fault.");
130 }
131
132 decode_istate(n, istate);
133 panic("General protection fault.");
134}
135
136static void ss_fault(int n, istate_t *istate)
137{
138 fault_if_from_uspace(istate, "Stack fault.");
139 decode_istate(n, istate);
140 panic("Stack fault.");
141}
142
143static void nm_fault(int n, istate_t *istate)
144{
145#ifdef CONFIG_FPU_LAZY
146 scheduler_fpu_lazy_request();
147#else
148 fault_if_from_uspace(istate, "FPU fault.");
149 panic("FPU fault.");
150#endif
151}
152
153#ifdef CONFIG_SMP
154static void tlb_shootdown_ipi(int n, istate_t *istate)
155{
156 trap_virtual_eoi();
157 tlb_shootdown_ipi_recv();
158}
159#endif
160
161/** Handler of IRQ exceptions.
162 *
163 */
164static void irq_interrupt(int n, istate_t *istate)
165{
166 ASSERT(n >= IVT_IRQBASE);
167
168 int inum = n - IVT_IRQBASE;
169 bool ack = false;
170 ASSERT(inum < IRQ_COUNT);
171 ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
172
173 irq_t *irq = irq_dispatch_and_lock(inum);
174 if (irq) {
175 /*
176 * The IRQ handler was found.
177 */
178
179 if (irq->preack) {
180 /* Send EOI before processing the interrupt */
181 trap_virtual_eoi();
182 ack = true;
183 }
184 irq->handler(irq);
185 irq_spinlock_unlock(&irq->lock, false);
186 } else {
187 /*
188 * Spurious interrupt.
189 */
190#ifdef CONFIG_DEBUG
191 printf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, inum);
192#endif
193 }
194
195 if (!ack)
196 trap_virtual_eoi();
197}
198
199void interrupt_init(void)
200{
201 int i;
202
203 for (i = 0; i < IVT_ITEMS; i++)
204 exc_register(i, "null", (iroutine) null_interrupt);
205
206 for (i = 0; i < IRQ_COUNT; i++) {
207 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
208 exc_register(IVT_IRQBASE + i, "irq",
209 (iroutine) irq_interrupt);
210 }
211
212 exc_register(0, "de_fault", (iroutine) de_fault);
213 exc_register(7, "nm_fault", (iroutine) nm_fault);
214 exc_register(12, "ss_fault", (iroutine) ss_fault);
215 exc_register(13, "gp_fault", (iroutine) gp_fault);
216 exc_register(14, "ident_mapper", (iroutine) ident_page_fault);
217
218#ifdef CONFIG_SMP
219 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
220 (iroutine) tlb_shootdown_ipi);
221#endif
222}
223
224void trap_virtual_enable_irqs(uint16_t irqmask)
225{
226 if (enable_irqs_function)
227 enable_irqs_function(irqmask);
228 else
229 panic("No enable_irqs_function.");
230}
231
232void trap_virtual_disable_irqs(uint16_t irqmask)
233{
234 if (disable_irqs_function)
235 disable_irqs_function(irqmask);
236 else
237 panic("No disable_irqs_function.");
238}
239
240/** @}
241 */
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