source: mainline/kernel/arch/amd64/src/interrupt.c@ bab75df6

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since bab75df6 was bab75df6, checked in by Jiri Svoboda <jiri@…>, 7 years ago

Let kernel code get printf via the standard stdio header. Clean up unused includes.

  • Property mode set to 100644
File size: 6.7 KB
Line 
1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup kernel_amd64_interrupt
30 * @{
31 */
32/** @file
33 */
34
35#include <arch/interrupt.h>
36#include <assert.h>
37#include <log.h>
38#include <panic.h>
39#include <arch/drivers/i8259.h>
40#include <halt.h>
41#include <cpu.h>
42#include <arch/asm.h>
43#include <mm/tlb.h>
44#include <mm/as.h>
45#include <arch.h>
46#include <proc/scheduler.h>
47#include <proc/thread.h>
48#include <proc/task.h>
49#include <synch/spinlock.h>
50#include <arch/ddi/ddi.h>
51#include <interrupt.h>
52#include <ddi/irq.h>
53#include <symtab.h>
54#include <stacktrace.h>
55#include <smp/smp_call.h>
56
57/*
58 * Interrupt and exception dispatching.
59 */
60
61void (*disable_irqs_function)(uint16_t irqmask) = NULL;
62void (*enable_irqs_function)(uint16_t irqmask) = NULL;
63void (*eoi_function)(void) = NULL;
64const char *irqs_info = NULL;
65
66void istate_decode(istate_t *istate)
67{
68 log_printf("cs =%0#18" PRIx64 "\trip=%0#18" PRIx64 "\t"
69 "rfl=%0#18" PRIx64 "\terr=%0#18" PRIx64 "\n",
70 istate->cs, istate->rip, istate->rflags, istate->error_word);
71
72 if (istate_from_uspace(istate))
73 log_printf("ss =%0#18" PRIx64 "\n", istate->ss);
74
75 log_printf("rax=%0#18" PRIx64 "\trbx=%0#18" PRIx64 "\t"
76 "rcx=%0#18" PRIx64 "\trdx=%0#18" PRIx64 "\n",
77 istate->rax, istate->rbx, istate->rcx, istate->rdx);
78
79 log_printf("rsi=%0#18" PRIx64 "\trdi=%0#18" PRIx64 "\t"
80 "rbp=%0#18" PRIx64 "\trsp=%0#18" PRIx64 "\n",
81 istate->rsi, istate->rdi, istate->rbp,
82 istate_from_uspace(istate) ? istate->rsp :
83 (uintptr_t) &istate->rsp);
84
85 log_printf("r8 =%0#18" PRIx64 "\tr9 =%0#18" PRIx64 "\t"
86 "r10=%0#18" PRIx64 "\tr11=%0#18" PRIx64 "\n",
87 istate->r8, istate->r9, istate->r10, istate->r11);
88
89 log_printf("r12=%0#18" PRIx64 "\tr13=%0#18" PRIx64 "\t"
90 "r14=%0#18" PRIx64 "\tr15=%0#18" PRIx64 "\n",
91 istate->r12, istate->r13, istate->r14, istate->r15);
92}
93
94static void trap_virtual_eoi(void)
95{
96 if (eoi_function)
97 eoi_function();
98 else
99 panic("No eoi_function.");
100
101}
102
103static void null_interrupt(unsigned int n, istate_t *istate)
104{
105 fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
106 panic_badtrap(istate, n, "Unserviced interrupt.");
107}
108
109static void de_fault(unsigned int n, istate_t *istate)
110{
111 fault_if_from_uspace(istate, "Divide error.");
112 panic_badtrap(istate, n, "Divide error.");
113}
114
115/** General Protection Fault.
116 *
117 */
118static void gp_fault(unsigned int n, istate_t *istate)
119{
120 if (TASK) {
121 irq_spinlock_lock(&TASK->lock, false);
122 size_t ver = TASK->arch.iomapver;
123 irq_spinlock_unlock(&TASK->lock, false);
124
125 if (CPU->arch.iomapver_copy != ver) {
126 /*
127 * This fault can be caused by an early access
128 * to I/O port because of an out-dated
129 * I/O Permission bitmap installed on CPU.
130 * Install the fresh copy and restart
131 * the instruction.
132 */
133 io_perm_bitmap_install();
134 return;
135 }
136 fault_if_from_uspace(istate, "General protection fault.");
137 }
138 panic_badtrap(istate, n, "General protection fault.");
139}
140
141static void ss_fault(unsigned int n, istate_t *istate)
142{
143 fault_if_from_uspace(istate, "Stack fault.");
144 panic_badtrap(istate, n, "Stack fault.");
145}
146
147static void nm_fault(unsigned int n, istate_t *istate)
148{
149#ifdef CONFIG_FPU_LAZY
150 scheduler_fpu_lazy_request();
151#else
152 fault_if_from_uspace(istate, "FPU fault.");
153 panic("FPU fault.");
154#endif
155}
156
157#ifdef CONFIG_SMP
158static void tlb_shootdown_ipi(unsigned int n, istate_t *istate)
159{
160 trap_virtual_eoi();
161 tlb_shootdown_ipi_recv();
162}
163
164static void arch_smp_call_ipi_recv(unsigned int n, istate_t *istate)
165{
166 trap_virtual_eoi();
167 smp_call_ipi_recv();
168}
169#endif
170
171/** Handler of IRQ exceptions.
172 *
173 */
174static void irq_interrupt(unsigned int n, istate_t *istate)
175{
176 assert(n >= IVT_IRQBASE);
177
178 unsigned int inum = n - IVT_IRQBASE;
179 bool ack = false;
180 assert(inum < IRQ_COUNT);
181 assert((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
182
183 irq_t *irq = irq_dispatch_and_lock(inum);
184 if (irq) {
185 /*
186 * The IRQ handler was found.
187 */
188
189 if (irq->preack) {
190 /* Send EOI before processing the interrupt */
191 trap_virtual_eoi();
192 ack = true;
193 }
194 irq->handler(irq);
195 irq_spinlock_unlock(&irq->lock, false);
196 } else {
197 /*
198 * Spurious interrupt.
199 */
200#ifdef CONFIG_DEBUG
201 log(LF_ARCH, LVL_DEBUG, "cpu%u: spurious interrupt (inum=%u)",
202 CPU->id, inum);
203#endif
204 }
205
206 if (!ack)
207 trap_virtual_eoi();
208}
209
210void interrupt_init(void)
211{
212 unsigned int i;
213
214 for (i = 0; i < IVT_ITEMS; i++)
215 exc_register(i, "null", false, (iroutine_t) null_interrupt);
216
217 for (i = 0; i < IRQ_COUNT; i++) {
218 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
219 exc_register(IVT_IRQBASE + i, "irq", true,
220 (iroutine_t) irq_interrupt);
221 }
222
223 exc_register(VECTOR_DE, "de_fault", true, (iroutine_t) de_fault);
224 exc_register(VECTOR_NM, "nm_fault", true, (iroutine_t) nm_fault);
225 exc_register(VECTOR_SS, "ss_fault", true, (iroutine_t) ss_fault);
226 exc_register(VECTOR_GP, "gp_fault", true, (iroutine_t) gp_fault);
227
228#ifdef CONFIG_SMP
229 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
230 (iroutine_t) tlb_shootdown_ipi);
231 exc_register(VECTOR_SMP_CALL_IPI, "smp_call", true,
232 (iroutine_t) arch_smp_call_ipi_recv);
233#endif
234}
235
236void trap_virtual_enable_irqs(uint16_t irqmask)
237{
238 if (enable_irqs_function)
239 enable_irqs_function(irqmask);
240 else
241 panic("No enable_irqs_function.");
242}
243
244void trap_virtual_disable_irqs(uint16_t irqmask)
245{
246 if (disable_irqs_function)
247 disable_irqs_function(irqmask);
248 else
249 panic("No disable_irqs_function.");
250}
251
252/** @}
253 */
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