1 | /*
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2 | * Copyright (c) 2001-2004 Jakub Jermar
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup amd64interrupt
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30 | * @{
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31 | */
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32 | /** @file
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33 | */
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34 |
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35 | #include <arch/interrupt.h>
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36 | #include <assert.h>
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37 | #include <print.h>
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38 | #include <log.h>
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39 | #include <panic.h>
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40 | #include <arch/drivers/i8259.h>
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41 | #include <func.h>
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42 | #include <cpu.h>
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43 | #include <arch/asm.h>
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44 | #include <mm/tlb.h>
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45 | #include <mm/as.h>
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46 | #include <arch.h>
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47 | #include <proc/scheduler.h>
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48 | #include <proc/thread.h>
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49 | #include <proc/task.h>
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50 | #include <synch/spinlock.h>
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51 | #include <arch/ddi/ddi.h>
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52 | #include <interrupt.h>
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53 | #include <ddi/irq.h>
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54 | #include <symtab.h>
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55 | #include <stacktrace.h>
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56 | #include <smp/smp_call.h>
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57 |
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58 | /*
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59 | * Interrupt and exception dispatching.
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60 | */
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61 |
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62 | void (* disable_irqs_function)(uint16_t irqmask) = NULL;
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63 | void (* enable_irqs_function)(uint16_t irqmask) = NULL;
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64 | void (* eoi_function)(void) = NULL;
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65 | const char *irqs_info = NULL;
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66 |
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67 | void istate_decode(istate_t *istate)
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68 | {
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69 | log_printf("cs =%0#18" PRIx64 "\trip=%0#18" PRIx64 "\t"
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70 | "rfl=%0#18" PRIx64 "\terr=%0#18" PRIx64 "\n",
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71 | istate->cs, istate->rip, istate->rflags, istate->error_word);
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72 |
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73 | if (istate_from_uspace(istate))
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74 | log_printf("ss =%0#18" PRIx64 "\n", istate->ss);
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75 |
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76 | log_printf("rax=%0#18" PRIx64 "\trbx=%0#18" PRIx64 "\t"
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77 | "rcx=%0#18" PRIx64 "\trdx=%0#18" PRIx64 "\n",
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78 | istate->rax, istate->rbx, istate->rcx, istate->rdx);
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79 |
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80 | log_printf("rsi=%0#18" PRIx64 "\trdi=%0#18" PRIx64 "\t"
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81 | "rbp=%0#18" PRIx64 "\trsp=%0#18" PRIx64 "\n",
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82 | istate->rsi, istate->rdi, istate->rbp,
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83 | istate_from_uspace(istate) ? istate->rsp :
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84 | (uintptr_t) &istate->rsp);
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85 |
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86 | log_printf("r8 =%0#18" PRIx64 "\tr9 =%0#18" PRIx64 "\t"
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87 | "r10=%0#18" PRIx64 "\tr11=%0#18" PRIx64 "\n",
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88 | istate->r8, istate->r9, istate->r10, istate->r11);
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89 |
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90 | log_printf("r12=%0#18" PRIx64 "\tr13=%0#18" PRIx64 "\t"
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91 | "r14=%0#18" PRIx64 "\tr15=%0#18" PRIx64 "\n",
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92 | istate->r12, istate->r13, istate->r14, istate->r15);
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93 | }
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94 |
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95 | static void trap_virtual_eoi(void)
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96 | {
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97 | if (eoi_function)
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98 | eoi_function();
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99 | else
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100 | panic("No eoi_function.");
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101 |
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102 | }
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103 |
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104 | static void null_interrupt(unsigned int n, istate_t *istate)
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105 | {
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106 | fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
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107 | panic_badtrap(istate, n, "Unserviced interrupt.");
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108 | }
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109 |
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110 | static void de_fault(unsigned int n, istate_t *istate)
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111 | {
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112 | fault_if_from_uspace(istate, "Divide error.");
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113 | panic_badtrap(istate, n, "Divide error.");
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114 | }
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115 |
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116 | /** General Protection Fault.
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117 | *
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118 | */
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119 | static void gp_fault(unsigned int n, istate_t *istate)
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120 | {
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121 | if (TASK) {
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122 | irq_spinlock_lock(&TASK->lock, false);
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123 | size_t ver = TASK->arch.iomapver;
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124 | irq_spinlock_unlock(&TASK->lock, false);
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125 |
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126 | if (CPU->arch.iomapver_copy != ver) {
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127 | /*
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128 | * This fault can be caused by an early access
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129 | * to I/O port because of an out-dated
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130 | * I/O Permission bitmap installed on CPU.
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131 | * Install the fresh copy and restart
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132 | * the instruction.
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133 | */
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134 | io_perm_bitmap_install();
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135 | return;
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136 | }
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137 | fault_if_from_uspace(istate, "General protection fault.");
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138 | }
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139 | panic_badtrap(istate, n, "General protection fault.");
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140 | }
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141 |
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142 | static void ss_fault(unsigned int n, istate_t *istate)
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143 | {
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144 | fault_if_from_uspace(istate, "Stack fault.");
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145 | panic_badtrap(istate, n, "Stack fault.");
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146 | }
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147 |
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148 | static void nm_fault(unsigned int n, istate_t *istate)
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149 | {
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150 | #ifdef CONFIG_FPU_LAZY
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151 | scheduler_fpu_lazy_request();
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152 | #else
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153 | fault_if_from_uspace(istate, "FPU fault.");
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154 | panic("FPU fault.");
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155 | #endif
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156 | }
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157 |
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158 | #ifdef CONFIG_SMP
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159 | static void tlb_shootdown_ipi(unsigned int n, istate_t *istate)
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160 | {
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161 | trap_virtual_eoi();
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162 | tlb_shootdown_ipi_recv();
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163 | }
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164 |
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165 | static void arch_smp_call_ipi_recv(unsigned int n, istate_t *istate)
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166 | {
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167 | trap_virtual_eoi();
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168 | smp_call_ipi_recv();
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169 | }
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170 | #endif
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171 |
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172 | /** Handler of IRQ exceptions.
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173 | *
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174 | */
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175 | static void irq_interrupt(unsigned int n, istate_t *istate)
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176 | {
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177 | assert(n >= IVT_IRQBASE);
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178 |
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179 | unsigned int inum = n - IVT_IRQBASE;
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180 | bool ack = false;
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181 | assert(inum < IRQ_COUNT);
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182 | assert((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
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183 |
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184 | irq_t *irq = irq_dispatch_and_lock(inum);
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185 | if (irq) {
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186 | /*
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187 | * The IRQ handler was found.
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188 | */
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189 |
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190 | if (irq->preack) {
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191 | /* Send EOI before processing the interrupt */
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192 | trap_virtual_eoi();
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193 | ack = true;
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194 | }
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195 | irq->handler(irq);
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196 | irq_spinlock_unlock(&irq->lock, false);
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197 | } else {
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198 | /*
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199 | * Spurious interrupt.
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200 | */
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201 | #ifdef CONFIG_DEBUG
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202 | log(LF_ARCH, LVL_DEBUG, "cpu%u: spurious interrupt (inum=%u)",
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203 | CPU->id, inum);
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204 | #endif
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205 | }
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206 |
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207 | if (!ack)
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208 | trap_virtual_eoi();
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209 | }
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210 |
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211 | void interrupt_init(void)
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212 | {
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213 | unsigned int i;
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214 |
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215 | for (i = 0; i < IVT_ITEMS; i++)
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216 | exc_register(i, "null", false, (iroutine_t) null_interrupt);
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217 |
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218 | for (i = 0; i < IRQ_COUNT; i++) {
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219 | if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
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220 | exc_register(IVT_IRQBASE + i, "irq", true,
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221 | (iroutine_t) irq_interrupt);
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222 | }
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223 |
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224 | exc_register(VECTOR_DE, "de_fault", true, (iroutine_t) de_fault);
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225 | exc_register(VECTOR_NM, "nm_fault", true, (iroutine_t) nm_fault);
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226 | exc_register(VECTOR_SS, "ss_fault", true, (iroutine_t) ss_fault);
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227 | exc_register(VECTOR_GP, "gp_fault", true, (iroutine_t) gp_fault);
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228 |
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229 | #ifdef CONFIG_SMP
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230 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
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231 | (iroutine_t) tlb_shootdown_ipi);
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232 | exc_register(VECTOR_SMP_CALL_IPI, "smp_call", true,
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233 | (iroutine_t) arch_smp_call_ipi_recv);
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234 | #endif
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235 | }
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236 |
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237 | void trap_virtual_enable_irqs(uint16_t irqmask)
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238 | {
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239 | if (enable_irqs_function)
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240 | enable_irqs_function(irqmask);
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241 | else
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242 | panic("No enable_irqs_function.");
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243 | }
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244 |
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245 | void trap_virtual_disable_irqs(uint16_t irqmask)
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246 | {
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247 | if (disable_irqs_function)
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248 | disable_irqs_function(irqmask);
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249 | else
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250 | panic("No disable_irqs_function.");
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251 | }
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252 |
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253 | /** @}
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254 | */
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