source: mainline/kernel/arch/amd64/src/interrupt.c@ 63e27ef

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 63e27ef was 63e27ef, checked in by Jiri Svoboda <jiri@…>, 8 years ago

ASSERT → assert

  • Property mode set to 100644
File size: 6.7 KB
Line 
1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup amd64interrupt
30 * @{
31 */
32/** @file
33 */
34
35#include <arch/interrupt.h>
36#include <assert.h>
37#include <print.h>
38#include <log.h>
39#include <panic.h>
40#include <arch/drivers/i8259.h>
41#include <func.h>
42#include <cpu.h>
43#include <arch/asm.h>
44#include <mm/tlb.h>
45#include <mm/as.h>
46#include <arch.h>
47#include <proc/scheduler.h>
48#include <proc/thread.h>
49#include <proc/task.h>
50#include <synch/spinlock.h>
51#include <arch/ddi/ddi.h>
52#include <interrupt.h>
53#include <ddi/irq.h>
54#include <symtab.h>
55#include <stacktrace.h>
56#include <smp/smp_call.h>
57
58/*
59 * Interrupt and exception dispatching.
60 */
61
62void (* disable_irqs_function)(uint16_t irqmask) = NULL;
63void (* enable_irqs_function)(uint16_t irqmask) = NULL;
64void (* eoi_function)(void) = NULL;
65const char *irqs_info = NULL;
66
67void istate_decode(istate_t *istate)
68{
69 log_printf("cs =%0#18" PRIx64 "\trip=%0#18" PRIx64 "\t"
70 "rfl=%0#18" PRIx64 "\terr=%0#18" PRIx64 "\n",
71 istate->cs, istate->rip, istate->rflags, istate->error_word);
72
73 if (istate_from_uspace(istate))
74 log_printf("ss =%0#18" PRIx64 "\n", istate->ss);
75
76 log_printf("rax=%0#18" PRIx64 "\trbx=%0#18" PRIx64 "\t"
77 "rcx=%0#18" PRIx64 "\trdx=%0#18" PRIx64 "\n",
78 istate->rax, istate->rbx, istate->rcx, istate->rdx);
79
80 log_printf("rsi=%0#18" PRIx64 "\trdi=%0#18" PRIx64 "\t"
81 "rbp=%0#18" PRIx64 "\trsp=%0#18" PRIx64 "\n",
82 istate->rsi, istate->rdi, istate->rbp,
83 istate_from_uspace(istate) ? istate->rsp :
84 (uintptr_t) &istate->rsp);
85
86 log_printf("r8 =%0#18" PRIx64 "\tr9 =%0#18" PRIx64 "\t"
87 "r10=%0#18" PRIx64 "\tr11=%0#18" PRIx64 "\n",
88 istate->r8, istate->r9, istate->r10, istate->r11);
89
90 log_printf("r12=%0#18" PRIx64 "\tr13=%0#18" PRIx64 "\t"
91 "r14=%0#18" PRIx64 "\tr15=%0#18" PRIx64 "\n",
92 istate->r12, istate->r13, istate->r14, istate->r15);
93}
94
95static void trap_virtual_eoi(void)
96{
97 if (eoi_function)
98 eoi_function();
99 else
100 panic("No eoi_function.");
101
102}
103
104static void null_interrupt(unsigned int n, istate_t *istate)
105{
106 fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
107 panic_badtrap(istate, n, "Unserviced interrupt.");
108}
109
110static void de_fault(unsigned int n, istate_t *istate)
111{
112 fault_if_from_uspace(istate, "Divide error.");
113 panic_badtrap(istate, n, "Divide error.");
114}
115
116/** General Protection Fault.
117 *
118 */
119static void gp_fault(unsigned int n, istate_t *istate)
120{
121 if (TASK) {
122 irq_spinlock_lock(&TASK->lock, false);
123 size_t ver = TASK->arch.iomapver;
124 irq_spinlock_unlock(&TASK->lock, false);
125
126 if (CPU->arch.iomapver_copy != ver) {
127 /*
128 * This fault can be caused by an early access
129 * to I/O port because of an out-dated
130 * I/O Permission bitmap installed on CPU.
131 * Install the fresh copy and restart
132 * the instruction.
133 */
134 io_perm_bitmap_install();
135 return;
136 }
137 fault_if_from_uspace(istate, "General protection fault.");
138 }
139 panic_badtrap(istate, n, "General protection fault.");
140}
141
142static void ss_fault(unsigned int n, istate_t *istate)
143{
144 fault_if_from_uspace(istate, "Stack fault.");
145 panic_badtrap(istate, n, "Stack fault.");
146}
147
148static void nm_fault(unsigned int n, istate_t *istate)
149{
150#ifdef CONFIG_FPU_LAZY
151 scheduler_fpu_lazy_request();
152#else
153 fault_if_from_uspace(istate, "FPU fault.");
154 panic("FPU fault.");
155#endif
156}
157
158#ifdef CONFIG_SMP
159static void tlb_shootdown_ipi(unsigned int n, istate_t *istate)
160{
161 trap_virtual_eoi();
162 tlb_shootdown_ipi_recv();
163}
164
165static void arch_smp_call_ipi_recv(unsigned int n, istate_t *istate)
166{
167 trap_virtual_eoi();
168 smp_call_ipi_recv();
169}
170#endif
171
172/** Handler of IRQ exceptions.
173 *
174 */
175static void irq_interrupt(unsigned int n, istate_t *istate)
176{
177 assert(n >= IVT_IRQBASE);
178
179 unsigned int inum = n - IVT_IRQBASE;
180 bool ack = false;
181 assert(inum < IRQ_COUNT);
182 assert((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
183
184 irq_t *irq = irq_dispatch_and_lock(inum);
185 if (irq) {
186 /*
187 * The IRQ handler was found.
188 */
189
190 if (irq->preack) {
191 /* Send EOI before processing the interrupt */
192 trap_virtual_eoi();
193 ack = true;
194 }
195 irq->handler(irq);
196 irq_spinlock_unlock(&irq->lock, false);
197 } else {
198 /*
199 * Spurious interrupt.
200 */
201#ifdef CONFIG_DEBUG
202 log(LF_ARCH, LVL_DEBUG, "cpu%u: spurious interrupt (inum=%u)",
203 CPU->id, inum);
204#endif
205 }
206
207 if (!ack)
208 trap_virtual_eoi();
209}
210
211void interrupt_init(void)
212{
213 unsigned int i;
214
215 for (i = 0; i < IVT_ITEMS; i++)
216 exc_register(i, "null", false, (iroutine_t) null_interrupt);
217
218 for (i = 0; i < IRQ_COUNT; i++) {
219 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
220 exc_register(IVT_IRQBASE + i, "irq", true,
221 (iroutine_t) irq_interrupt);
222 }
223
224 exc_register(VECTOR_DE, "de_fault", true, (iroutine_t) de_fault);
225 exc_register(VECTOR_NM, "nm_fault", true, (iroutine_t) nm_fault);
226 exc_register(VECTOR_SS, "ss_fault", true, (iroutine_t) ss_fault);
227 exc_register(VECTOR_GP, "gp_fault", true, (iroutine_t) gp_fault);
228
229#ifdef CONFIG_SMP
230 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
231 (iroutine_t) tlb_shootdown_ipi);
232 exc_register(VECTOR_SMP_CALL_IPI, "smp_call", true,
233 (iroutine_t) arch_smp_call_ipi_recv);
234#endif
235}
236
237void trap_virtual_enable_irqs(uint16_t irqmask)
238{
239 if (enable_irqs_function)
240 enable_irqs_function(irqmask);
241 else
242 panic("No enable_irqs_function.");
243}
244
245void trap_virtual_disable_irqs(uint16_t irqmask)
246{
247 if (disable_irqs_function)
248 disable_irqs_function(irqmask);
249 else
250 panic("No disable_irqs_function.");
251}
252
253/** @}
254 */
Note: See TracBrowser for help on using the repository browser.