source: mainline/kernel/arch/amd64/src/interrupt.c@ cee51fd

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since cee51fd was acc7ce4, checked in by Martin Decky <martin@…>, 15 years ago

uspace interrupt controller drivers for i8259 and APIC (non-functional yet)
convert NE2000 driver to use these drivers (not enabling the IRQ in kernel), this solves the "spurious interrupt" issue
(however, on SMP machines this renders the driver unusable for now since the APIC driver does not do anything yet)

  • Property mode set to 100644
File size: 6.3 KB
Line 
1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup amd64interrupt
30 * @{
31 */
32/** @file
33 */
34
35#include <arch/interrupt.h>
36#include <print.h>
37#include <debug.h>
38#include <panic.h>
39#include <arch/drivers/i8259.h>
40#include <func.h>
41#include <cpu.h>
42#include <arch/asm.h>
43#include <mm/tlb.h>
44#include <mm/as.h>
45#include <arch.h>
46#include <arch/asm.h>
47#include <proc/scheduler.h>
48#include <proc/thread.h>
49#include <proc/task.h>
50#include <synch/spinlock.h>
51#include <arch/ddi/ddi.h>
52#include <interrupt.h>
53#include <ddi/irq.h>
54#include <symtab.h>
55#include <stacktrace.h>
56
57/*
58 * Interrupt and exception dispatching.
59 */
60
61void (* disable_irqs_function)(uint16_t irqmask) = NULL;
62void (* enable_irqs_function)(uint16_t irqmask) = NULL;
63void (* eoi_function)(void) = NULL;
64const char *irqs_info = NULL;
65
66void istate_decode(istate_t *istate)
67{
68 printf("cs =%#0" PRIx64 "\trip=%p\t"
69 "rfl=%#0" PRIx64 "\terr=%#0" PRIx64 "\n",
70 istate->cs, (void *) istate->rip,
71 istate->rflags, istate->error_word);
72
73 if (istate_from_uspace(istate))
74 printf("ss =%#0" PRIx64 "\n", istate->ss);
75
76 printf("rax=%#0" PRIx64 "\trbx=%#0" PRIx64 "\t"
77 "rcx=%#0" PRIx64 "\trdx=%#0" PRIx64 "\n",
78 istate->rax, istate->rbx, istate->rcx, istate->rdx);
79
80 printf("rsi=%p\trdi=%p\trbp=%p\trsp=%p\n",
81 (void *) istate->rsi, (void *) istate->rdi,
82 (void *) istate->rbp,
83 istate_from_uspace(istate) ? ((void *) istate->rsp) :
84 &istate->rsp);
85
86 printf("r8 =%#0" PRIx64 "\tr9 =%#0" PRIx64 "\t"
87 "r10=%#0" PRIx64 "\tr11=%#0" PRIx64 "\n",
88 istate->r8, istate->r9, istate->r10, istate->r11);
89
90 printf("r12=%#0" PRIx64 "\tr13=%#0" PRIx64 "\t"
91 "r14=%#0" PRIx64 "\tr15=%#0" PRIx64 "\n",
92 istate->r12, istate->r13, istate->r14, istate->r15);
93}
94
95static void trap_virtual_eoi(void)
96{
97 if (eoi_function)
98 eoi_function();
99 else
100 panic("No eoi_function.");
101
102}
103
104static void null_interrupt(unsigned int n, istate_t *istate)
105{
106 fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
107 panic_badtrap(istate, n, "Unserviced interrupt.");
108}
109
110static void de_fault(unsigned int n, istate_t *istate)
111{
112 fault_if_from_uspace(istate, "Divide error.");
113 panic_badtrap(istate, n, "Divide error.");
114}
115
116/** General Protection Fault.
117 *
118 */
119static void gp_fault(unsigned int n, istate_t *istate)
120{
121 if (TASK) {
122 irq_spinlock_lock(&TASK->lock, false);
123 size_t ver = TASK->arch.iomapver;
124 irq_spinlock_unlock(&TASK->lock, false);
125
126 if (CPU->arch.iomapver_copy != ver) {
127 /*
128 * This fault can be caused by an early access
129 * to I/O port because of an out-dated
130 * I/O Permission bitmap installed on CPU.
131 * Install the fresh copy and restart
132 * the instruction.
133 */
134 io_perm_bitmap_install();
135 return;
136 }
137 fault_if_from_uspace(istate, "General protection fault.");
138 }
139 panic_badtrap(istate, n, "General protection fault.");
140}
141
142static void ss_fault(unsigned int n, istate_t *istate)
143{
144 fault_if_from_uspace(istate, "Stack fault.");
145 panic_badtrap(istate, n, "Stack fault.");
146}
147
148static void nm_fault(unsigned int n, istate_t *istate)
149{
150#ifdef CONFIG_FPU_LAZY
151 scheduler_fpu_lazy_request();
152#else
153 fault_if_from_uspace(istate, "FPU fault.");
154 panic("FPU fault.");
155#endif
156}
157
158#ifdef CONFIG_SMP
159static void tlb_shootdown_ipi(unsigned int n, istate_t *istate)
160{
161 trap_virtual_eoi();
162 tlb_shootdown_ipi_recv();
163}
164#endif
165
166/** Handler of IRQ exceptions.
167 *
168 */
169static void irq_interrupt(unsigned int n, istate_t *istate)
170{
171 ASSERT(n >= IVT_IRQBASE);
172
173 unsigned int inum = n - IVT_IRQBASE;
174 bool ack = false;
175 ASSERT(inum < IRQ_COUNT);
176 ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
177
178 irq_t *irq = irq_dispatch_and_lock(inum);
179 if (irq) {
180 /*
181 * The IRQ handler was found.
182 */
183
184 if (irq->preack) {
185 /* Send EOI before processing the interrupt */
186 trap_virtual_eoi();
187 ack = true;
188 }
189 irq->handler(irq);
190 irq_spinlock_unlock(&irq->lock, false);
191 } else {
192 /*
193 * Spurious interrupt.
194 */
195#ifdef CONFIG_DEBUG
196 printf("cpu%u: spurious interrupt (inum=%u)\n", CPU->id, inum);
197#endif
198 }
199
200 if (!ack)
201 trap_virtual_eoi();
202}
203
204void interrupt_init(void)
205{
206 unsigned int i;
207
208 for (i = 0; i < IVT_ITEMS; i++)
209 exc_register(i, "null", false, (iroutine_t) null_interrupt);
210
211 for (i = 0; i < IRQ_COUNT; i++) {
212 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
213 exc_register(IVT_IRQBASE + i, "irq", true,
214 (iroutine_t) irq_interrupt);
215 }
216
217 exc_register(0, "de_fault", true, (iroutine_t) de_fault);
218 exc_register(7, "nm_fault", true, (iroutine_t) nm_fault);
219 exc_register(12, "ss_fault", true, (iroutine_t) ss_fault);
220 exc_register(13, "gp_fault", true, (iroutine_t) gp_fault);
221
222#ifdef CONFIG_SMP
223 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
224 (iroutine_t) tlb_shootdown_ipi);
225#endif
226}
227
228void trap_virtual_enable_irqs(uint16_t irqmask)
229{
230 if (enable_irqs_function)
231 enable_irqs_function(irqmask);
232 else
233 panic("No enable_irqs_function.");
234}
235
236void trap_virtual_disable_irqs(uint16_t irqmask)
237{
238 if (disable_irqs_function)
239 disable_irqs_function(irqmask);
240 else
241 panic("No disable_irqs_function.");
242}
243
244/** @}
245 */
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