[db3341e] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2001-2004 Jakub Jermar
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[db3341e] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[06e1e95] | 29 | /** @addtogroup amd64interrupt
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[db3341e] | 35 | #include <arch/interrupt.h>
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[63e27ef] | 36 | #include <assert.h>
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[db3341e] | 37 | #include <print.h>
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[b2fa1204] | 38 | #include <log.h>
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[db3341e] | 39 | #include <panic.h>
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[80d31883] | 40 | #include <arch/drivers/i8259.h>
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[b2e121a] | 41 | #include <halt.h>
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[db3341e] | 42 | #include <cpu.h>
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| 43 | #include <arch/asm.h>
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| 44 | #include <mm/tlb.h>
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[20d50a1] | 45 | #include <mm/as.h>
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[db3341e] | 46 | #include <arch.h>
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[b49f4ae] | 47 | #include <proc/scheduler.h>
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[1084a784] | 48 | #include <proc/thread.h>
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[2382d09] | 49 | #include <proc/task.h>
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| 50 | #include <synch/spinlock.h>
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| 51 | #include <arch/ddi/ddi.h>
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[5626277] | 52 | #include <interrupt.h>
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[8607db8] | 53 | #include <ddi/irq.h>
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[e2b762ec] | 54 | #include <symtab.h>
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[304342e] | 55 | #include <stacktrace.h>
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[2ee1ccc] | 56 | #include <smp/smp_call.h>
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[e2b762ec] | 57 |
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[8607db8] | 58 | /*
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| 59 | * Interrupt and exception dispatching.
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| 60 | */
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| 61 |
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| 62 | void (* disable_irqs_function)(uint16_t irqmask) = NULL;
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| 63 | void (* enable_irqs_function)(uint16_t irqmask) = NULL;
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| 64 | void (* eoi_function)(void) = NULL;
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[acc7ce4] | 65 | const char *irqs_info = NULL;
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[8607db8] | 66 |
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[22a28a69] | 67 | void istate_decode(istate_t *istate)
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[8ec9bae] | 68 | {
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[b2fa1204] | 69 | log_printf("cs =%0#18" PRIx64 "\trip=%0#18" PRIx64 "\t"
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[2438fa6] | 70 | "rfl=%0#18" PRIx64 "\terr=%0#18" PRIx64 "\n",
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| 71 | istate->cs, istate->rip, istate->rflags, istate->error_word);
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[a35b458] | 72 |
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[9171f12] | 73 | if (istate_from_uspace(istate))
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[b2fa1204] | 74 | log_printf("ss =%0#18" PRIx64 "\n", istate->ss);
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[a35b458] | 75 |
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[b2fa1204] | 76 | log_printf("rax=%0#18" PRIx64 "\trbx=%0#18" PRIx64 "\t"
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[2438fa6] | 77 | "rcx=%0#18" PRIx64 "\trdx=%0#18" PRIx64 "\n",
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[9171f12] | 78 | istate->rax, istate->rbx, istate->rcx, istate->rdx);
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[a35b458] | 79 |
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[b2fa1204] | 80 | log_printf("rsi=%0#18" PRIx64 "\trdi=%0#18" PRIx64 "\t"
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[2438fa6] | 81 | "rbp=%0#18" PRIx64 "\trsp=%0#18" PRIx64 "\n",
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| 82 | istate->rsi, istate->rdi, istate->rbp,
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| 83 | istate_from_uspace(istate) ? istate->rsp :
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| 84 | (uintptr_t) &istate->rsp);
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[a35b458] | 85 |
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[b2fa1204] | 86 | log_printf("r8 =%0#18" PRIx64 "\tr9 =%0#18" PRIx64 "\t"
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[2438fa6] | 87 | "r10=%0#18" PRIx64 "\tr11=%0#18" PRIx64 "\n",
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[9171f12] | 88 | istate->r8, istate->r9, istate->r10, istate->r11);
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[a35b458] | 89 |
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[b2fa1204] | 90 | log_printf("r12=%0#18" PRIx64 "\tr13=%0#18" PRIx64 "\t"
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[2438fa6] | 91 | "r14=%0#18" PRIx64 "\tr15=%0#18" PRIx64 "\n",
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[9171f12] | 92 | istate->r12, istate->r13, istate->r14, istate->r15);
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[8ec9bae] | 93 | }
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[db3341e] | 94 |
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[8607db8] | 95 | static void trap_virtual_eoi(void)
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| 96 | {
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| 97 | if (eoi_function)
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| 98 | eoi_function();
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| 99 | else
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[f651e80] | 100 | panic("No eoi_function.");
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[db3341e] | 101 |
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[8607db8] | 102 | }
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[db3341e] | 103 |
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[214ec25c] | 104 | static void null_interrupt(unsigned int n, istate_t *istate)
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[db3341e] | 105 | {
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[214ec25c] | 106 | fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
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[a043e39] | 107 | panic_badtrap(istate, n, "Unserviced interrupt.");
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[db3341e] | 108 | }
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| 109 |
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[214ec25c] | 110 | static void de_fault(unsigned int n, istate_t *istate)
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[4491338] | 111 | {
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| 112 | fault_if_from_uspace(istate, "Divide error.");
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[a043e39] | 113 | panic_badtrap(istate, n, "Divide error.");
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[4491338] | 114 | }
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| 115 |
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[da1bafb] | 116 | /** General Protection Fault.
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| 117 | *
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| 118 | */
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[214ec25c] | 119 | static void gp_fault(unsigned int n, istate_t *istate)
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[db3341e] | 120 | {
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[2382d09] | 121 | if (TASK) {
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[da1bafb] | 122 | irq_spinlock_lock(&TASK->lock, false);
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| 123 | size_t ver = TASK->arch.iomapver;
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| 124 | irq_spinlock_unlock(&TASK->lock, false);
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[a35b458] | 125 |
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[2382d09] | 126 | if (CPU->arch.iomapver_copy != ver) {
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| 127 | /*
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| 128 | * This fault can be caused by an early access
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| 129 | * to I/O port because of an out-dated
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| 130 | * I/O Permission bitmap installed on CPU.
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| 131 | * Install the fresh copy and restart
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| 132 | * the instruction.
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| 133 | */
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| 134 | io_perm_bitmap_install();
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| 135 | return;
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| 136 | }
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[f651e80] | 137 | fault_if_from_uspace(istate, "General protection fault.");
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[2382d09] | 138 | }
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[a043e39] | 139 | panic_badtrap(istate, n, "General protection fault.");
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[db3341e] | 140 | }
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| 141 |
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[214ec25c] | 142 | static void ss_fault(unsigned int n, istate_t *istate)
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[db3341e] | 143 | {
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[f651e80] | 144 | fault_if_from_uspace(istate, "Stack fault.");
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[a043e39] | 145 | panic_badtrap(istate, n, "Stack fault.");
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[db3341e] | 146 | }
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| 147 |
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[214ec25c] | 148 | static void nm_fault(unsigned int n, istate_t *istate)
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[db3341e] | 149 | {
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[6da1013f] | 150 | #ifdef CONFIG_FPU_LAZY
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[b49f4ae] | 151 | scheduler_fpu_lazy_request();
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| 152 | #else
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[f651e80] | 153 | fault_if_from_uspace(istate, "FPU fault.");
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| 154 | panic("FPU fault.");
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[b49f4ae] | 155 | #endif
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[db3341e] | 156 | }
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| 157 |
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[cbc8ac6] | 158 | #ifdef CONFIG_SMP
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[214ec25c] | 159 | static void tlb_shootdown_ipi(unsigned int n, istate_t *istate)
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[db3341e] | 160 | {
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| 161 | trap_virtual_eoi();
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| 162 | tlb_shootdown_ipi_recv();
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| 163 | }
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[2ee1ccc] | 164 |
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| 165 | static void arch_smp_call_ipi_recv(unsigned int n, istate_t *istate)
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| 166 | {
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| 167 | trap_virtual_eoi();
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| 168 | smp_call_ipi_recv();
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| 169 | }
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[cbc8ac6] | 170 | #endif
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[db3341e] | 171 |
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[da1bafb] | 172 | /** Handler of IRQ exceptions.
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| 173 | *
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| 174 | */
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[214ec25c] | 175 | static void irq_interrupt(unsigned int n, istate_t *istate)
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[8607db8] | 176 | {
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[63e27ef] | 177 | assert(n >= IVT_IRQBASE);
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[a35b458] | 178 |
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[214ec25c] | 179 | unsigned int inum = n - IVT_IRQBASE;
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[7bcfbbc] | 180 | bool ack = false;
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[63e27ef] | 181 | assert(inum < IRQ_COUNT);
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| 182 | assert((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
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[a35b458] | 183 |
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[8607db8] | 184 | irq_t *irq = irq_dispatch_and_lock(inum);
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| 185 | if (irq) {
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| 186 | /*
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| 187 | * The IRQ handler was found.
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| 188 | */
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[a35b458] | 189 |
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[7bcfbbc] | 190 | if (irq->preack) {
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| 191 | /* Send EOI before processing the interrupt */
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| 192 | trap_virtual_eoi();
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| 193 | ack = true;
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| 194 | }
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[6cd9aa6] | 195 | irq->handler(irq);
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[da1bafb] | 196 | irq_spinlock_unlock(&irq->lock, false);
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[8607db8] | 197 | } else {
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| 198 | /*
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| 199 | * Spurious interrupt.
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| 200 | */
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| 201 | #ifdef CONFIG_DEBUG
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[b2fa1204] | 202 | log(LF_ARCH, LVL_DEBUG, "cpu%u: spurious interrupt (inum=%u)",
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| 203 | CPU->id, inum);
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[8607db8] | 204 | #endif
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| 205 | }
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[a35b458] | 206 |
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[7bcfbbc] | 207 | if (!ack)
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| 208 | trap_virtual_eoi();
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[8607db8] | 209 | }
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| 210 |
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| 211 | void interrupt_init(void)
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| 212 | {
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[b3b7e14a] | 213 | unsigned int i;
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[a35b458] | 214 |
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[8607db8] | 215 | for (i = 0; i < IVT_ITEMS; i++)
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[b3b7e14a] | 216 | exc_register(i, "null", false, (iroutine_t) null_interrupt);
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[a35b458] | 217 |
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[8607db8] | 218 | for (i = 0; i < IRQ_COUNT; i++) {
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| 219 | if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
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[b3b7e14a] | 220 | exc_register(IVT_IRQBASE + i, "irq", true,
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| 221 | (iroutine_t) irq_interrupt);
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[8607db8] | 222 | }
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[a35b458] | 223 |
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[4b0206c] | 224 | exc_register(VECTOR_DE, "de_fault", true, (iroutine_t) de_fault);
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| 225 | exc_register(VECTOR_NM, "nm_fault", true, (iroutine_t) nm_fault);
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| 226 | exc_register(VECTOR_SS, "ss_fault", true, (iroutine_t) ss_fault);
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| 227 | exc_register(VECTOR_GP, "gp_fault", true, (iroutine_t) gp_fault);
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[a35b458] | 228 |
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[8607db8] | 229 | #ifdef CONFIG_SMP
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[b3b7e14a] | 230 | exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
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| 231 | (iroutine_t) tlb_shootdown_ipi);
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[1b20da0] | 232 | exc_register(VECTOR_SMP_CALL_IPI, "smp_call", true,
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[2ee1ccc] | 233 | (iroutine_t) arch_smp_call_ipi_recv);
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[8607db8] | 234 | #endif
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| 235 | }
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| 236 |
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[7f1c620] | 237 | void trap_virtual_enable_irqs(uint16_t irqmask)
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[db3341e] | 238 | {
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| 239 | if (enable_irqs_function)
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| 240 | enable_irqs_function(irqmask);
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| 241 | else
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[f651e80] | 242 | panic("No enable_irqs_function.");
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[db3341e] | 243 | }
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| 244 |
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[7f1c620] | 245 | void trap_virtual_disable_irqs(uint16_t irqmask)
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[db3341e] | 246 | {
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| 247 | if (disable_irqs_function)
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| 248 | disable_irqs_function(irqmask);
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| 249 | else
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[f651e80] | 250 | panic("No disable_irqs_function.");
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[db3341e] | 251 | }
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| 252 |
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[06e1e95] | 253 | /** @}
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[b45c443] | 254 | */
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