source: mainline/kernel/arch/amd64/src/interrupt.c@ d8bb821

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d8bb821 was b2fa1204, checked in by Martin Sucha <sucha14@…>, 11 years ago

Cherrypick usage of kernel logger

  • Property mode set to 100644
File size: 6.5 KB
RevLine 
[db3341e]1/*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[db3341e]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[06e1e95]29/** @addtogroup amd64interrupt
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[db3341e]35#include <arch/interrupt.h>
36#include <print.h>
[b2fa1204]37#include <log.h>
[db3341e]38#include <debug.h>
39#include <panic.h>
[80d31883]40#include <arch/drivers/i8259.h>
[db3341e]41#include <func.h>
42#include <cpu.h>
43#include <arch/asm.h>
44#include <mm/tlb.h>
[20d50a1]45#include <mm/as.h>
[db3341e]46#include <arch.h>
[3396f59]47#include <arch/asm.h>
[b49f4ae]48#include <proc/scheduler.h>
[1084a784]49#include <proc/thread.h>
[2382d09]50#include <proc/task.h>
51#include <synch/spinlock.h>
52#include <arch/ddi/ddi.h>
[5626277]53#include <interrupt.h>
[8607db8]54#include <ddi/irq.h>
[e2b762ec]55#include <symtab.h>
[304342e]56#include <stacktrace.h>
[e2b762ec]57
[8607db8]58/*
59 * Interrupt and exception dispatching.
60 */
61
62void (* disable_irqs_function)(uint16_t irqmask) = NULL;
63void (* enable_irqs_function)(uint16_t irqmask) = NULL;
64void (* eoi_function)(void) = NULL;
[acc7ce4]65const char *irqs_info = NULL;
[8607db8]66
[22a28a69]67void istate_decode(istate_t *istate)
[8ec9bae]68{
[b2fa1204]69 log_printf("cs =%0#18" PRIx64 "\trip=%0#18" PRIx64 "\t"
[2438fa6]70 "rfl=%0#18" PRIx64 "\terr=%0#18" PRIx64 "\n",
71 istate->cs, istate->rip, istate->rflags, istate->error_word);
[7e752b2]72
[9171f12]73 if (istate_from_uspace(istate))
[b2fa1204]74 log_printf("ss =%0#18" PRIx64 "\n", istate->ss);
[9171f12]75
[b2fa1204]76 log_printf("rax=%0#18" PRIx64 "\trbx=%0#18" PRIx64 "\t"
[2438fa6]77 "rcx=%0#18" PRIx64 "\trdx=%0#18" PRIx64 "\n",
[9171f12]78 istate->rax, istate->rbx, istate->rcx, istate->rdx);
[7e752b2]79
[b2fa1204]80 log_printf("rsi=%0#18" PRIx64 "\trdi=%0#18" PRIx64 "\t"
[2438fa6]81 "rbp=%0#18" PRIx64 "\trsp=%0#18" PRIx64 "\n",
82 istate->rsi, istate->rdi, istate->rbp,
83 istate_from_uspace(istate) ? istate->rsp :
84 (uintptr_t) &istate->rsp);
[7e752b2]85
[b2fa1204]86 log_printf("r8 =%0#18" PRIx64 "\tr9 =%0#18" PRIx64 "\t"
[2438fa6]87 "r10=%0#18" PRIx64 "\tr11=%0#18" PRIx64 "\n",
[9171f12]88 istate->r8, istate->r9, istate->r10, istate->r11);
[7e752b2]89
[b2fa1204]90 log_printf("r12=%0#18" PRIx64 "\tr13=%0#18" PRIx64 "\t"
[2438fa6]91 "r14=%0#18" PRIx64 "\tr15=%0#18" PRIx64 "\n",
[9171f12]92 istate->r12, istate->r13, istate->r14, istate->r15);
[8ec9bae]93}
[db3341e]94
[8607db8]95static void trap_virtual_eoi(void)
96{
97 if (eoi_function)
98 eoi_function();
99 else
[f651e80]100 panic("No eoi_function.");
[db3341e]101
[8607db8]102}
[db3341e]103
[214ec25c]104static void null_interrupt(unsigned int n, istate_t *istate)
[db3341e]105{
[214ec25c]106 fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
[a043e39]107 panic_badtrap(istate, n, "Unserviced interrupt.");
[db3341e]108}
109
[214ec25c]110static void de_fault(unsigned int n, istate_t *istate)
[4491338]111{
112 fault_if_from_uspace(istate, "Divide error.");
[a043e39]113 panic_badtrap(istate, n, "Divide error.");
[4491338]114}
115
[da1bafb]116/** General Protection Fault.
117 *
118 */
[214ec25c]119static void gp_fault(unsigned int n, istate_t *istate)
[db3341e]120{
[2382d09]121 if (TASK) {
[da1bafb]122 irq_spinlock_lock(&TASK->lock, false);
123 size_t ver = TASK->arch.iomapver;
124 irq_spinlock_unlock(&TASK->lock, false);
125
[2382d09]126 if (CPU->arch.iomapver_copy != ver) {
127 /*
128 * This fault can be caused by an early access
129 * to I/O port because of an out-dated
130 * I/O Permission bitmap installed on CPU.
131 * Install the fresh copy and restart
132 * the instruction.
133 */
134 io_perm_bitmap_install();
135 return;
136 }
[f651e80]137 fault_if_from_uspace(istate, "General protection fault.");
[2382d09]138 }
[a043e39]139 panic_badtrap(istate, n, "General protection fault.");
[db3341e]140}
141
[214ec25c]142static void ss_fault(unsigned int n, istate_t *istate)
[db3341e]143{
[f651e80]144 fault_if_from_uspace(istate, "Stack fault.");
[a043e39]145 panic_badtrap(istate, n, "Stack fault.");
[db3341e]146}
147
[214ec25c]148static void nm_fault(unsigned int n, istate_t *istate)
[db3341e]149{
[6da1013f]150#ifdef CONFIG_FPU_LAZY
[b49f4ae]151 scheduler_fpu_lazy_request();
152#else
[f651e80]153 fault_if_from_uspace(istate, "FPU fault.");
154 panic("FPU fault.");
[b49f4ae]155#endif
[db3341e]156}
157
[cbc8ac6]158#ifdef CONFIG_SMP
[214ec25c]159static void tlb_shootdown_ipi(unsigned int n, istate_t *istate)
[db3341e]160{
161 trap_virtual_eoi();
162 tlb_shootdown_ipi_recv();
163}
[cbc8ac6]164#endif
[db3341e]165
[da1bafb]166/** Handler of IRQ exceptions.
167 *
168 */
[214ec25c]169static void irq_interrupt(unsigned int n, istate_t *istate)
[8607db8]170{
171 ASSERT(n >= IVT_IRQBASE);
172
[214ec25c]173 unsigned int inum = n - IVT_IRQBASE;
[7bcfbbc]174 bool ack = false;
[8607db8]175 ASSERT(inum < IRQ_COUNT);
176 ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
[7bcfbbc]177
[8607db8]178 irq_t *irq = irq_dispatch_and_lock(inum);
179 if (irq) {
180 /*
181 * The IRQ handler was found.
182 */
[da1bafb]183
[7bcfbbc]184 if (irq->preack) {
185 /* Send EOI before processing the interrupt */
186 trap_virtual_eoi();
187 ack = true;
188 }
[6cd9aa6]189 irq->handler(irq);
[da1bafb]190 irq_spinlock_unlock(&irq->lock, false);
[8607db8]191 } else {
192 /*
193 * Spurious interrupt.
194 */
195#ifdef CONFIG_DEBUG
[b2fa1204]196 log(LF_ARCH, LVL_DEBUG, "cpu%u: spurious interrupt (inum=%u)",
197 CPU->id, inum);
[8607db8]198#endif
199 }
[7bcfbbc]200
201 if (!ack)
202 trap_virtual_eoi();
[8607db8]203}
204
205void interrupt_init(void)
206{
[b3b7e14a]207 unsigned int i;
[8607db8]208
209 for (i = 0; i < IVT_ITEMS; i++)
[b3b7e14a]210 exc_register(i, "null", false, (iroutine_t) null_interrupt);
[8607db8]211
212 for (i = 0; i < IRQ_COUNT; i++) {
213 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
[b3b7e14a]214 exc_register(IVT_IRQBASE + i, "irq", true,
215 (iroutine_t) irq_interrupt);
[8607db8]216 }
217
[b3b7e14a]218 exc_register(0, "de_fault", true, (iroutine_t) de_fault);
219 exc_register(7, "nm_fault", true, (iroutine_t) nm_fault);
220 exc_register(12, "ss_fault", true, (iroutine_t) ss_fault);
221 exc_register(13, "gp_fault", true, (iroutine_t) gp_fault);
[8607db8]222
223#ifdef CONFIG_SMP
[b3b7e14a]224 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
225 (iroutine_t) tlb_shootdown_ipi);
[8607db8]226#endif
227}
228
[7f1c620]229void trap_virtual_enable_irqs(uint16_t irqmask)
[db3341e]230{
231 if (enable_irqs_function)
232 enable_irqs_function(irqmask);
233 else
[f651e80]234 panic("No enable_irqs_function.");
[db3341e]235}
236
[7f1c620]237void trap_virtual_disable_irqs(uint16_t irqmask)
[db3341e]238{
239 if (disable_irqs_function)
240 disable_irqs_function(irqmask);
241 else
[f651e80]242 panic("No disable_irqs_function.");
[db3341e]243}
244
[06e1e95]245/** @}
[b45c443]246 */
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