source: mainline/kernel/arch/amd64/src/interrupt.c@ d19b3fc

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d19b3fc was d19b3fc, checked in by Jakub Jermar <jakub@…>, 7 years ago

Remove smp_call

  • Property mode set to 100644
File size: 6.4 KB
RevLine 
[db3341e]1/*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[db3341e]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[c5429fe]29/** @addtogroup kernel_amd64_interrupt
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[db3341e]35#include <arch/interrupt.h>
[63e27ef]36#include <assert.h>
[b2fa1204]37#include <log.h>
[db3341e]38#include <panic.h>
[80d31883]39#include <arch/drivers/i8259.h>
[b2e121a]40#include <halt.h>
[db3341e]41#include <cpu.h>
42#include <arch/asm.h>
43#include <mm/tlb.h>
[20d50a1]44#include <mm/as.h>
[db3341e]45#include <arch.h>
[b49f4ae]46#include <proc/scheduler.h>
[1084a784]47#include <proc/thread.h>
[2382d09]48#include <proc/task.h>
49#include <synch/spinlock.h>
50#include <arch/ddi/ddi.h>
[5626277]51#include <interrupt.h>
[8607db8]52#include <ddi/irq.h>
[e2b762ec]53#include <symtab.h>
[304342e]54#include <stacktrace.h>
[e2b762ec]55
[8607db8]56/*
57 * Interrupt and exception dispatching.
58 */
59
[1433ecda]60void (*disable_irqs_function)(uint16_t irqmask) = NULL;
61void (*enable_irqs_function)(uint16_t irqmask) = NULL;
62void (*eoi_function)(void) = NULL;
[acc7ce4]63const char *irqs_info = NULL;
[8607db8]64
[22a28a69]65void istate_decode(istate_t *istate)
[8ec9bae]66{
[b2fa1204]67 log_printf("cs =%0#18" PRIx64 "\trip=%0#18" PRIx64 "\t"
[2438fa6]68 "rfl=%0#18" PRIx64 "\terr=%0#18" PRIx64 "\n",
69 istate->cs, istate->rip, istate->rflags, istate->error_word);
[a35b458]70
[9171f12]71 if (istate_from_uspace(istate))
[b2fa1204]72 log_printf("ss =%0#18" PRIx64 "\n", istate->ss);
[a35b458]73
[b2fa1204]74 log_printf("rax=%0#18" PRIx64 "\trbx=%0#18" PRIx64 "\t"
[2438fa6]75 "rcx=%0#18" PRIx64 "\trdx=%0#18" PRIx64 "\n",
[9171f12]76 istate->rax, istate->rbx, istate->rcx, istate->rdx);
[a35b458]77
[b2fa1204]78 log_printf("rsi=%0#18" PRIx64 "\trdi=%0#18" PRIx64 "\t"
[2438fa6]79 "rbp=%0#18" PRIx64 "\trsp=%0#18" PRIx64 "\n",
80 istate->rsi, istate->rdi, istate->rbp,
81 istate_from_uspace(istate) ? istate->rsp :
82 (uintptr_t) &istate->rsp);
[a35b458]83
[b2fa1204]84 log_printf("r8 =%0#18" PRIx64 "\tr9 =%0#18" PRIx64 "\t"
[2438fa6]85 "r10=%0#18" PRIx64 "\tr11=%0#18" PRIx64 "\n",
[9171f12]86 istate->r8, istate->r9, istate->r10, istate->r11);
[a35b458]87
[b2fa1204]88 log_printf("r12=%0#18" PRIx64 "\tr13=%0#18" PRIx64 "\t"
[2438fa6]89 "r14=%0#18" PRIx64 "\tr15=%0#18" PRIx64 "\n",
[9171f12]90 istate->r12, istate->r13, istate->r14, istate->r15);
[8ec9bae]91}
[db3341e]92
[8607db8]93static void trap_virtual_eoi(void)
94{
95 if (eoi_function)
96 eoi_function();
97 else
[f651e80]98 panic("No eoi_function.");
[db3341e]99
[8607db8]100}
[db3341e]101
[214ec25c]102static void null_interrupt(unsigned int n, istate_t *istate)
[db3341e]103{
[214ec25c]104 fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
[a043e39]105 panic_badtrap(istate, n, "Unserviced interrupt.");
[db3341e]106}
107
[214ec25c]108static void de_fault(unsigned int n, istate_t *istate)
[4491338]109{
110 fault_if_from_uspace(istate, "Divide error.");
[a043e39]111 panic_badtrap(istate, n, "Divide error.");
[4491338]112}
113
[da1bafb]114/** General Protection Fault.
115 *
116 */
[214ec25c]117static void gp_fault(unsigned int n, istate_t *istate)
[db3341e]118{
[2382d09]119 if (TASK) {
[da1bafb]120 irq_spinlock_lock(&TASK->lock, false);
121 size_t ver = TASK->arch.iomapver;
122 irq_spinlock_unlock(&TASK->lock, false);
[a35b458]123
[2382d09]124 if (CPU->arch.iomapver_copy != ver) {
125 /*
126 * This fault can be caused by an early access
127 * to I/O port because of an out-dated
128 * I/O Permission bitmap installed on CPU.
129 * Install the fresh copy and restart
130 * the instruction.
131 */
132 io_perm_bitmap_install();
133 return;
134 }
[f651e80]135 fault_if_from_uspace(istate, "General protection fault.");
[2382d09]136 }
[a043e39]137 panic_badtrap(istate, n, "General protection fault.");
[db3341e]138}
139
[214ec25c]140static void ss_fault(unsigned int n, istate_t *istate)
[db3341e]141{
[f651e80]142 fault_if_from_uspace(istate, "Stack fault.");
[a043e39]143 panic_badtrap(istate, n, "Stack fault.");
[db3341e]144}
145
[214ec25c]146static void nm_fault(unsigned int n, istate_t *istate)
[db3341e]147{
[6da1013f]148#ifdef CONFIG_FPU_LAZY
[b49f4ae]149 scheduler_fpu_lazy_request();
150#else
[f651e80]151 fault_if_from_uspace(istate, "FPU fault.");
152 panic("FPU fault.");
[b49f4ae]153#endif
[db3341e]154}
155
[cbc8ac6]156#ifdef CONFIG_SMP
[214ec25c]157static void tlb_shootdown_ipi(unsigned int n, istate_t *istate)
[db3341e]158{
159 trap_virtual_eoi();
160 tlb_shootdown_ipi_recv();
161}
[cbc8ac6]162#endif
[db3341e]163
[da1bafb]164/** Handler of IRQ exceptions.
165 *
166 */
[214ec25c]167static void irq_interrupt(unsigned int n, istate_t *istate)
[8607db8]168{
[63e27ef]169 assert(n >= IVT_IRQBASE);
[a35b458]170
[214ec25c]171 unsigned int inum = n - IVT_IRQBASE;
[7bcfbbc]172 bool ack = false;
[63e27ef]173 assert(inum < IRQ_COUNT);
174 assert((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
[a35b458]175
[8607db8]176 irq_t *irq = irq_dispatch_and_lock(inum);
177 if (irq) {
178 /*
179 * The IRQ handler was found.
180 */
[a35b458]181
[7bcfbbc]182 if (irq->preack) {
183 /* Send EOI before processing the interrupt */
184 trap_virtual_eoi();
185 ack = true;
186 }
[6cd9aa6]187 irq->handler(irq);
[da1bafb]188 irq_spinlock_unlock(&irq->lock, false);
[8607db8]189 } else {
190 /*
191 * Spurious interrupt.
192 */
193#ifdef CONFIG_DEBUG
[b2fa1204]194 log(LF_ARCH, LVL_DEBUG, "cpu%u: spurious interrupt (inum=%u)",
195 CPU->id, inum);
[8607db8]196#endif
197 }
[a35b458]198
[7bcfbbc]199 if (!ack)
200 trap_virtual_eoi();
[8607db8]201}
202
203void interrupt_init(void)
204{
[b3b7e14a]205 unsigned int i;
[a35b458]206
[8607db8]207 for (i = 0; i < IVT_ITEMS; i++)
[b3b7e14a]208 exc_register(i, "null", false, (iroutine_t) null_interrupt);
[a35b458]209
[8607db8]210 for (i = 0; i < IRQ_COUNT; i++) {
211 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
[b3b7e14a]212 exc_register(IVT_IRQBASE + i, "irq", true,
213 (iroutine_t) irq_interrupt);
[8607db8]214 }
[a35b458]215
[4b0206c]216 exc_register(VECTOR_DE, "de_fault", true, (iroutine_t) de_fault);
217 exc_register(VECTOR_NM, "nm_fault", true, (iroutine_t) nm_fault);
218 exc_register(VECTOR_SS, "ss_fault", true, (iroutine_t) ss_fault);
219 exc_register(VECTOR_GP, "gp_fault", true, (iroutine_t) gp_fault);
[a35b458]220
[8607db8]221#ifdef CONFIG_SMP
[b3b7e14a]222 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
223 (iroutine_t) tlb_shootdown_ipi);
[8607db8]224#endif
225}
226
[7f1c620]227void trap_virtual_enable_irqs(uint16_t irqmask)
[db3341e]228{
229 if (enable_irqs_function)
230 enable_irqs_function(irqmask);
231 else
[f651e80]232 panic("No enable_irqs_function.");
[db3341e]233}
234
[7f1c620]235void trap_virtual_disable_irqs(uint16_t irqmask)
[db3341e]236{
237 if (disable_irqs_function)
238 disable_irqs_function(irqmask);
239 else
[f651e80]240 panic("No disable_irqs_function.");
[db3341e]241}
242
[06e1e95]243/** @}
[b45c443]244 */
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