source: mainline/kernel/arch/amd64/src/ddi/ddi.c@ 1d3d2cf

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 1d3d2cf was 1d3d2cf, checked in by Martin Decky <martin@…>, 15 years ago

rename gdtselector to GDT_SELECTOR to make explicit it is a macro
unify how bootstrap_gdtr is defined on amd64 and ia32

  • Property mode set to 100644
File size: 4.6 KB
Line 
1/*
2 * Copyright (c) 2006 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup amd64ddi
30 * @{
31 */
32/** @file
33 */
34
35#include <ddi/ddi.h>
36#include <arch/ddi/ddi.h>
37#include <proc/task.h>
38#include <typedefs.h>
39#include <adt/bitmap.h>
40#include <mm/slab.h>
41#include <arch/pm.h>
42#include <errno.h>
43#include <arch/cpu.h>
44#include <arch.h>
45#include <align.h>
46
47/** Enable I/O space range for task.
48 *
49 * Interrupts are disabled and task is locked.
50 *
51 * @param task Task.
52 * @param ioaddr Startign I/O space address.
53 * @param size Size of the enabled I/O range.
54 *
55 * @return 0 on success or an error code from errno.h.
56 *
57 */
58int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size)
59{
60 size_t bits = ioaddr + size;
61 if (bits > IO_PORTS)
62 return ENOENT;
63
64 if (task->arch.iomap.bits < bits) {
65 /*
66 * The I/O permission bitmap is too small and needs to be grown.
67 */
68
69 uint8_t *newmap = (uint8_t *) malloc(BITS2BYTES(bits), FRAME_ATOMIC);
70 if (!newmap)
71 return ENOMEM;
72
73 bitmap_t oldiomap;
74 bitmap_initialize(&oldiomap, task->arch.iomap.map,
75 task->arch.iomap.bits);
76 bitmap_initialize(&task->arch.iomap, newmap, bits);
77
78 /*
79 * Mark the new range inaccessible.
80 */
81 bitmap_set_range(&task->arch.iomap, oldiomap.bits,
82 bits - oldiomap.bits);
83
84 /*
85 * In case there really existed smaller iomap,
86 * copy its contents and deallocate it.
87 */
88 if (oldiomap.bits) {
89 bitmap_copy(&task->arch.iomap, &oldiomap,
90 oldiomap.bits);
91 free(oldiomap.map);
92 }
93 }
94
95 /*
96 * Enable the range and we are done.
97 */
98 bitmap_clear_range(&task->arch.iomap, (size_t) ioaddr, (size_t) size);
99
100 /*
101 * Increment I/O Permission bitmap generation counter.
102 */
103 task->arch.iomapver++;
104
105 return 0;
106}
107
108/** Install I/O Permission bitmap.
109 *
110 * Current task's I/O permission bitmap, if any, is installed
111 * in the current CPU's TSS.
112 *
113 * Interrupts must be disabled prior this call.
114 *
115 */
116void io_perm_bitmap_install(void)
117{
118 /* First, copy the I/O Permission Bitmap. */
119 irq_spinlock_lock(&TASK->lock, false);
120 size_t ver = TASK->arch.iomapver;
121 size_t bits = TASK->arch.iomap.bits;
122 if (bits) {
123 ASSERT(TASK->arch.iomap.map);
124
125 bitmap_t iomap;
126 bitmap_initialize(&iomap, CPU->arch.tss->iomap,
127 TSS_IOMAP_SIZE * 8);
128 bitmap_copy(&iomap, &TASK->arch.iomap, TASK->arch.iomap.bits);
129
130 /*
131 * It is safe to set the trailing eight bits because of the
132 * extra convenience byte in TSS_IOMAP_SIZE.
133 */
134 bitmap_set_range(&iomap, ALIGN_UP(TASK->arch.iomap.bits, 8), 8);
135 }
136 irq_spinlock_unlock(&TASK->lock, false);
137
138 /*
139 * Second, adjust TSS segment limit.
140 * Take the extra ending byte will all bits set into account.
141 */
142 ptr_16_64_t cpugdtr;
143 gdtr_store(&cpugdtr);
144
145 descriptor_t *gdt_p = (descriptor_t *) cpugdtr.base;
146 gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + BITS2BYTES(bits));
147 gdtr_load(&cpugdtr);
148
149 /*
150 * Before we load new TSS limit, the current TSS descriptor
151 * type must be changed to describe inactive TSS.
152 */
153 tss_descriptor_t *tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES];
154 tss_desc->type = AR_TSS;
155 tr_load(GDT_SELECTOR(TSS_DES));
156
157 /*
158 * Update the generation count so that faults caused by
159 * early accesses can be serviced.
160 */
161 CPU->arch.iomapver_copy = ver;
162}
163
164/** @}
165 */
Note: See TracBrowser for help on using the repository browser.