[f52e54da] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2006 Jakub Jermar
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[f52e54da] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[06e1e95] | 29 | /** @addtogroup amd64ddi
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[f52e54da] | 35 | #include <ddi/ddi.h>
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[2382d09] | 36 | #include <arch/ddi/ddi.h>
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[f52e54da] | 37 | #include <proc/task.h>
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[d99c1d2] | 38 | #include <typedefs.h>
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[73e9b49] | 39 | #include <adt/bitmap.h>
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| 40 | #include <mm/slab.h>
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| 41 | #include <arch/pm.h>
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| 42 | #include <errno.h>
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[c7c0b89b] | 43 | #include <arch/cpu.h>
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[7de18418] | 44 | #include <cpu.h>
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[2382d09] | 45 | #include <arch.h>
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[ea199e5] | 46 | #include <align.h>
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[f52e54da] | 47 |
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[2382d09] | 48 | /** Install I/O Permission bitmap.
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| 49 | *
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| 50 | * Current task's I/O permission bitmap, if any, is installed
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| 51 | * in the current CPU's TSS.
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| 52 | *
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| 53 | * Interrupts must be disabled prior this call.
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[da1bafb] | 54 | *
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[2382d09] | 55 | */
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| 56 | void io_perm_bitmap_install(void)
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| 57 | {
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| 58 | /* First, copy the I/O Permission Bitmap. */
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[da1bafb] | 59 | irq_spinlock_lock(&TASK->lock, false);
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[7de18418] | 60 |
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[da1bafb] | 61 | size_t ver = TASK->arch.iomapver;
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[7de18418] | 62 | size_t elements = TASK->arch.iomap.elements;
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| 63 |
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| 64 | if (elements > 0) {
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| 65 | ASSERT(TASK->arch.iomap.bits);
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[da1bafb] | 66 |
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| 67 | bitmap_t iomap;
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[c5396c1] | 68 | bitmap_initialize(&iomap, TSS_IOMAP_SIZE * 8,
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[7de18418] | 69 | CPU->arch.tss->iomap);
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| 70 | bitmap_copy(&iomap, &TASK->arch.iomap, elements);
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[da1bafb] | 71 |
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[e9e5b9ab] | 72 | /*
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| 73 | * Set the trailing bits in the last byte of the map to disable
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| 74 | * I/O access.
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| 75 | */
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[7de18418] | 76 | bitmap_set_range(&iomap, elements,
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| 77 | ALIGN_UP(elements, 8) - elements);
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| 78 |
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[2382d09] | 79 | /*
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[25b9e2c] | 80 | * It is safe to set the trailing eight bits because of the
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| 81 | * extra convenience byte in TSS_IOMAP_SIZE.
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[2382d09] | 82 | */
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[7de18418] | 83 | bitmap_set_range(&iomap, ALIGN_UP(elements, 8), 8);
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[2382d09] | 84 | }
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[7de18418] | 85 |
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[da1bafb] | 86 | irq_spinlock_unlock(&TASK->lock, false);
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[99d6fd0] | 87 |
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[ea199e5] | 88 | /*
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| 89 | * Second, adjust TSS segment limit.
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[7de18418] | 90 | * Take the extra ending byte with all bits set into account.
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[ea199e5] | 91 | */
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[da1bafb] | 92 | ptr_16_64_t cpugdtr;
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[2382d09] | 93 | gdtr_store(&cpugdtr);
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[da1bafb] | 94 |
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| 95 | descriptor_t *gdt_p = (descriptor_t *) cpugdtr.base;
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[c5396c1] | 96 | size_t size = bitmap_size(elements);
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[7de18418] | 97 | gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + size);
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[2382d09] | 98 | gdtr_load(&cpugdtr);
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| 99 |
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| 100 | /*
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[99d6fd0] | 101 | * Before we load new TSS limit, the current TSS descriptor
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| 102 | * type must be changed to describe inactive TSS.
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| 103 | */
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[da1bafb] | 104 | tss_descriptor_t *tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES];
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[2382d09] | 105 | tss_desc->type = AR_TSS;
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[1d3d2cf] | 106 | tr_load(GDT_SELECTOR(TSS_DES));
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[2382d09] | 107 |
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| 108 | /*
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| 109 | * Update the generation count so that faults caused by
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| 110 | * early accesses can be serviced.
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| 111 | */
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| 112 | CPU->arch.iomapver_copy = ver;
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| 113 | }
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[b45c443] | 114 |
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[06e1e95] | 115 | /** @}
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[b45c443] | 116 | */
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