source: mainline/kernel/arch/amd64/src/boot/multiboot2.S@ 1f5c9c96

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 1f5c9c96 was 1f5c9c96, checked in by Martin Decky <martin@…>, 14 years ago

implement multiboot v2 specification and use it in GRUB for UEFI

  • improve multiboot v1 code, move defines to a common location
  • rename VESA framebuffer stuff to generic "boot framebuffer"
  • small collateral changes
  • Property mode set to 100644
File size: 6.0 KB
Line 
1/*
2 * Copyright (c) 2011 Martin Decky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch/boot/boot.h>
30#include <arch/mm/page.h>
31#include <arch/pm.h>
32#include <arch/cpuid.h>
33#include <arch/cpu.h>
34#include <genarch/multiboot/multiboot2.h>
35
36#define START_STACK (BOOT_OFFSET - BOOT_STACK_SIZE)
37
38.section K_TEXT_START, "ax"
39
40.code32
41
42.align 8
43.global multiboot2_image_start
44multiboot2_header_start:
45 .long MULTIBOOT2_HEADER_MAGIC
46 .long MULTIBOOT2_HEADER_ARCH_I386
47 .long multiboot2_header_end - multiboot2_header_start
48 .long -(MULTIBOOT2_HEADER_MAGIC + MULTIBOOT2_HEADER_ARCH_I386 + (multiboot2_header_end - multiboot2_header_start))
49
50 /* Information request tag */
51 tag_info_req_start:
52 .word MULTIBOOT2_TAG_INFO_REQ
53 .word MULTIBOOT2_FLAGS_REQUIRED
54 .long tag_info_req_end - tag_info_req_start
55 .long MULTIBOOT2_TAG_MODULE
56 .long MULTIBOOT2_TAG_MEMMAP
57 .long MULTIBOOT2_TAG_FBINFO
58 tag_info_req_end:
59
60 /* Address tag */
61 tag_address_start:
62 .word MULTIBOOT2_TAG_ADDRESS
63 .word MULTIBOOT2_FLAGS_REQUIRED
64 .long tag_address_end - tag_address_start
65 .long multiboot2_header_start
66 .long unmapped_ktext_start
67 .long 0
68 .long 0
69 tag_address_end:
70
71 /* Entry address tag */
72 tag_entry_address_start:
73 .word MULTIBOOT2_TAG_ENTRY_ADDRESS
74 .word MULTIBOOT2_FLAGS_REQUIRED
75 .long tag_entry_address_end - tag_entry_address_start
76 .long multiboot2_image_start
77 tag_entry_address_end:
78
79 /* Flags tag */
80 tag_flags_start:
81 .word MULTIBOOT2_TAG_FLAGS
82 .word MULTIBOOT2_FLAGS_REQUIRED
83 .long tag_flags_end - tag_flags_start
84 .long MULTIBOOT2_FLAGS_CONSOLE
85 tag_flags_end:
86
87 /* Framebuffer tag */
88 tag_framebuffer_start:
89 .word MULTIBOOT2_TAG_FRAMEBUFFER
90 .word MULTIBOOT2_FLAGS_REQUIRED
91 .long tag_framebuffer_end - tag_framebuffer_start
92 .long CONFIG_BFB_WIDTH
93 .long CONFIG_BFB_HEIGHT
94 .long CONFIG_BFB_BPP
95 tag_framebuffer_end:
96
97 /* Module alignment tag */
98 tag_module_align_start:
99 .word MULTIBOOT2_TAG_MODULE_ALIGN
100 .word MULTIBOOT2_FLAGS_REQUIRED
101 .long tag_module_align_end - tag_module_align_start
102 .long 0
103 tag_module_align_end:
104
105 /* Tag terminator */
106 tag_terminator_start:
107 .word MULTIBOOT2_TAG_TERMINATOR
108 .word MULTIBOOT2_FLAGS_REQUIRED
109 .long tag_terminator_end - tag_terminator_start
110 tag_terminator_end:
111multiboot2_header_end:
112
113multiboot2_image_start:
114 cld
115
116 /* Initialize stack pointer */
117 movl $START_STACK, %esp
118
119 /* Initialize Global Descriptor Table register */
120 lgdtl bootstrap_gdtr
121
122 /* Kernel data + stack */
123 movw $GDT_SELECTOR(KDATA_DES), %cx
124 movw %cx, %es
125 movw %cx, %ds
126 movw %cx, %ss
127
128 /*
129 * Simics seems to remove hidden part of GS on entering user mode
130 * when _visible_ part of GS does not point to user-mode segment.
131 */
132 movw $GDT_SELECTOR(UDATA_DES), %cx
133 movw %cx, %fs
134 movw %cx, %gs
135
136 jmpl $GDT_SELECTOR(KTEXT32_DES), $multiboot2_meeting_point
137 multiboot2_meeting_point:
138
139 /*
140 * Protected 32-bit. We want to reuse the code-seg descriptor,
141 * the Default operand size must not be 1 when entering long mode.
142 */
143
144 /* Save multiboot arguments */
145 movl %eax, multiboot_eax
146 movl %ebx, multiboot_ebx
147
148 movl $(INTEL_CPUID_EXTENDED), %eax
149 cpuid
150 cmp $(INTEL_CPUID_EXTENDED), %eax
151 ja extended_cpuid_supported
152
153 jmp pm_error_halt
154
155 extended_cpuid_supported:
156
157 movl $(AMD_CPUID_EXTENDED), %eax
158 cpuid
159 bt $(AMD_EXT_LONG_MODE), %edx
160 jc long_mode_supported
161
162 jmp pm_error_halt
163
164 long_mode_supported:
165
166 bt $(AMD_EXT_NOEXECUTE), %edx
167 jc noexecute_supported
168
169 jmp pm_error_halt
170
171 noexecute_supported:
172
173 movl $(INTEL_CPUID_STANDARD), %eax
174 cpuid
175 bt $(INTEL_FXSAVE), %edx
176 jc fx_supported
177
178 jmp pm_error_halt
179
180 fx_supported:
181
182 bt $(INTEL_SSE2), %edx
183 jc sse2_supported
184
185 jmp pm_error_halt
186
187 sse2_supported:
188
189 /*
190 * Enable 64-bit page translation entries - CR4.PAE = 1.
191 * Paging is not enabled until after long mode is enabled.
192 */
193
194 movl %cr4, %eax
195 btsl $5, %eax
196 movl %eax, %cr4
197
198 /* Set up paging tables */
199 leal ptl_0, %eax
200 movl %eax, %cr3
201
202 /* Enable long mode */
203 movl $EFER_MSR_NUM, %ecx
204 rdmsr /* read EFER */
205 btsl $AMD_LME_FLAG, %eax /* set LME = 1 */
206 wrmsr
207
208 /* Enable paging to activate long mode (set CR0.PG = 1) */
209 movl %cr0, %eax
210 btsl $31, %eax
211 movl %eax, %cr0
212
213 /* At this point we are in compatibility mode */
214 jmpl $GDT_SELECTOR(KTEXT_DES), $start64
215
216pm_error_halt:
217 cli
218 hlt1:
219 hlt
220 jmp hlt1
221
222.code64
223
224start64:
225
226 /*
227 * Long mode.
228 */
229
230 movq $(PA2KA(START_STACK)), %rsp
231
232 /* Create the first stack frame */
233 pushq $0
234 movq %rsp, %rbp
235
236 /* Call arch_pre_main(multiboot_eax, multiboot_ebx) */
237 xorq %rdi, %rdi
238 movl multiboot_eax, %edi
239 xorq %rsi, %rsi
240 movl multiboot_ebx, %esi
241
242 movabsq $arch_pre_main, %rax
243 callq *%rax
244
245 /* Call main_bsp() */
246 movabsq $main_bsp, %rax
247 call *%rax
248
249 /* Not reached */
250 cli
251 hlt0:
252 hlt
253 jmp hlt0
Note: See TracBrowser for help on using the repository browser.