source: mainline/kernel/arch/amd64/src/boot/multiboot2.S@ 4fc93d5

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 4fc93d5 was f66c203d, checked in by Martin Decky <martin@…>, 13 years ago

explicitly load default BIOS IDT for real-mode VESA BIOS access (GRUB 2.00 setups an empty IDT for bootstrap)
always use an empty IDT during bootstrap (for consistency)
make sure the interrupts are disabled during bootstrap
make sure correct GDT is set after returning from VESA BIOS

  • Property mode set to 100644
File size: 6.1 KB
Line 
1/*
2 * Copyright (c) 2011 Martin Decky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch/boot/boot.h>
30#include <arch/mm/page.h>
31#include <arch/pm.h>
32#include <arch/cpuid.h>
33#include <arch/cpu.h>
34#include <genarch/multiboot/multiboot2.h>
35
36#define START_STACK (BOOT_OFFSET - BOOT_STACK_SIZE)
37
38.section K_TEXT_START, "ax"
39
40.code32
41
42.align 8
43.global multiboot2_image_start
44multiboot2_header_start:
45 .long MULTIBOOT2_HEADER_MAGIC
46 .long MULTIBOOT2_HEADER_ARCH_I386
47 .long multiboot2_header_end - multiboot2_header_start
48 .long -(MULTIBOOT2_HEADER_MAGIC + MULTIBOOT2_HEADER_ARCH_I386 + (multiboot2_header_end - multiboot2_header_start))
49
50 /* Information request tag */
51 tag_info_req_start:
52 .word MULTIBOOT2_TAG_INFO_REQ
53 .word MULTIBOOT2_FLAGS_REQUIRED
54 .long tag_info_req_end - tag_info_req_start
55 .long MULTIBOOT2_TAG_MODULE
56 .long MULTIBOOT2_TAG_MEMMAP
57#ifdef CONFIG_FB
58 .long MULTIBOOT2_TAG_FBINFO
59#endif
60 tag_info_req_end:
61
62 /* Address tag */
63 tag_address_start:
64 .word MULTIBOOT2_TAG_ADDRESS
65 .word MULTIBOOT2_FLAGS_REQUIRED
66 .long tag_address_end - tag_address_start
67 .long multiboot2_header_start
68 .long unmapped_ktext_start
69 .long 0
70 .long 0
71 tag_address_end:
72
73 /* Entry address tag */
74 tag_entry_address_start:
75 .word MULTIBOOT2_TAG_ENTRY_ADDRESS
76 .word MULTIBOOT2_FLAGS_REQUIRED
77 .long tag_entry_address_end - tag_entry_address_start
78 .long multiboot2_image_start
79 tag_entry_address_end:
80
81 /* Flags tag */
82 tag_flags_start:
83 .word MULTIBOOT2_TAG_FLAGS
84 .word MULTIBOOT2_FLAGS_REQUIRED
85 .long tag_flags_end - tag_flags_start
86 .long MULTIBOOT2_FLAGS_CONSOLE
87 tag_flags_end:
88
89#ifdef CONFIG_FB
90 /* Framebuffer tag */
91 tag_framebuffer_start:
92 .word MULTIBOOT2_TAG_FRAMEBUFFER
93 .word MULTIBOOT2_FLAGS_REQUIRED
94 .long tag_framebuffer_end - tag_framebuffer_start
95 .long CONFIG_BFB_WIDTH
96 .long CONFIG_BFB_HEIGHT
97 .long CONFIG_BFB_BPP
98 tag_framebuffer_end:
99#endif
100
101 /* Module alignment tag */
102 tag_module_align_start:
103 .word MULTIBOOT2_TAG_MODULE_ALIGN
104 .word MULTIBOOT2_FLAGS_REQUIRED
105 .long tag_module_align_end - tag_module_align_start
106 .long 0
107 tag_module_align_end:
108
109 /* Tag terminator */
110 tag_terminator_start:
111 .word MULTIBOOT2_TAG_TERMINATOR
112 .word MULTIBOOT2_FLAGS_REQUIRED
113 .long tag_terminator_end - tag_terminator_start
114 tag_terminator_end:
115multiboot2_header_end:
116
117multiboot2_image_start:
118 cli
119 cld
120
121 /* Initialize stack pointer */
122 movl $START_STACK, %esp
123
124 /*
125 * Initialize Global Descriptor Table and
126 * Interrupt Descriptor Table registers
127 */
128 lgdtl bootstrap_gdtr
129 lidtl bootstrap_idtr
130
131 /* Kernel data + stack */
132 movw $GDT_SELECTOR(KDATA_DES), %cx
133 movw %cx, %es
134 movw %cx, %ds
135 movw %cx, %ss
136
137 /*
138 * Simics seems to remove hidden part of GS on entering user mode
139 * when _visible_ part of GS does not point to user-mode segment.
140 */
141 movw $GDT_SELECTOR(UDATA_DES), %cx
142 movw %cx, %fs
143 movw %cx, %gs
144
145 jmpl $GDT_SELECTOR(KTEXT32_DES), $multiboot2_meeting_point
146 multiboot2_meeting_point:
147
148 /*
149 * Protected 32-bit. We want to reuse the code-seg descriptor,
150 * the Default operand size must not be 1 when entering long mode.
151 */
152
153 /* Save multiboot arguments */
154 movl %eax, multiboot_eax
155 movl %ebx, multiboot_ebx
156
157 movl $(INTEL_CPUID_EXTENDED), %eax
158 cpuid
159 cmp $(INTEL_CPUID_EXTENDED), %eax
160 ja extended_cpuid_supported
161
162 jmp pm_error_halt
163
164 extended_cpuid_supported:
165
166 movl $(AMD_CPUID_EXTENDED), %eax
167 cpuid
168 bt $(AMD_EXT_LONG_MODE), %edx
169 jc long_mode_supported
170
171 jmp pm_error_halt
172
173 long_mode_supported:
174
175 bt $(AMD_EXT_NOEXECUTE), %edx
176 jc noexecute_supported
177
178 jmp pm_error_halt
179
180 noexecute_supported:
181
182 movl $(INTEL_CPUID_STANDARD), %eax
183 cpuid
184 bt $(INTEL_FXSAVE), %edx
185 jc fx_supported
186
187 jmp pm_error_halt
188
189 fx_supported:
190
191 bt $(INTEL_SSE2), %edx
192 jc sse2_supported
193
194 jmp pm_error_halt
195
196 sse2_supported:
197
198 /*
199 * Enable 64-bit page translation entries - CR4.PAE = 1.
200 * Paging is not enabled until after long mode is enabled.
201 */
202
203 movl %cr4, %eax
204 btsl $5, %eax
205 movl %eax, %cr4
206
207 /* Set up paging tables */
208 leal ptl_0, %eax
209 movl %eax, %cr3
210
211 /* Enable long mode */
212 movl $EFER_MSR_NUM, %ecx
213 rdmsr /* read EFER */
214 btsl $AMD_LME_FLAG, %eax /* set LME = 1 */
215 wrmsr
216
217 /* Enable paging to activate long mode (set CR0.PG = 1) */
218 movl %cr0, %eax
219 btsl $31, %eax
220 movl %eax, %cr0
221
222 /* At this point we are in compatibility mode */
223 jmpl $GDT_SELECTOR(KTEXT_DES), $start64
224
225pm_error_halt:
226 cli
227 hlt1:
228 hlt
229 jmp hlt1
230
231.code64
232
233start64:
234
235 /*
236 * Long mode.
237 */
238
239 movq $(PA2KA(START_STACK)), %rsp
240
241 /* Create the first stack frame */
242 pushq $0
243 movq %rsp, %rbp
244
245 /* Call arch_pre_main(multiboot_eax, multiboot_ebx) */
246 xorq %rdi, %rdi
247 movl multiboot_eax, %edi
248 xorq %rsi, %rsi
249 movl multiboot_ebx, %esi
250
251 movabsq $arch_pre_main, %rax
252 callq *%rax
253
254 /* Call main_bsp() */
255 movabsq $main_bsp, %rax
256 call *%rax
257
258 /* Not reached */
259 cli
260 hlt0:
261 hlt
262 jmp hlt0
Note: See TracBrowser for help on using the repository browser.