source: mainline/kernel/arch/amd64/src/asm.S@ c0e9f3f

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since c0e9f3f was c0e9f3f, checked in by Jakub Jermar <jakub@…>, 15 years ago

Change the amd64 istate_t and interrupt handler macro so that the istate
structure now captures all GPRs and provides seamless stack frame linkage.
  • Property mode set to 100644
File size: 11.2 KB
Line 
1/*
2 * Copyright (c) 2005 Ondrej Palkovsky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch/pm.h>
30#include <arch/mm/page.h>
31
32.text
33.global interrupt_handlers
34.global syscall_entry
35.global cpuid
36.global has_cpuid
37.global read_efer_flag
38.global set_efer_flag
39.global memsetb
40.global memsetw
41.global memcpy
42.global memcpy_from_uspace
43.global memcpy_to_uspace
44.global memcpy_from_uspace_failover_address
45.global memcpy_to_uspace_failover_address
46.global early_putchar
47
48/* Wrapper for generic memsetb */
49memsetb:
50 jmp _memsetb
51
52/* Wrapper for generic memsetw */
53memsetw:
54 jmp _memsetw
55
56#define MEMCPY_DST %rdi
57#define MEMCPY_SRC %rsi
58#define MEMCPY_SIZE %rdx
59
60/**
61 * Copy memory from/to userspace.
62 *
63 * This is almost conventional memcpy().
64 * The difference is that there is a failover part
65 * to where control is returned from a page fault if
66 * the page fault occurs during copy_from_uspace()
67 * or copy_to_uspace().
68 *
69 * @param MEMCPY_DST Destination address.
70 * @param MEMCPY_SRC Source address.
71 * @param MEMCPY_SIZE Number of bytes to copy.
72 *
73 * @retrun MEMCPY_DST on success, 0 on failure.
74 *
75 */
76memcpy:
77memcpy_from_uspace:
78memcpy_to_uspace:
79 movq MEMCPY_DST, %rax
80
81 movq MEMCPY_SIZE, %rcx
82 shrq $3, %rcx /* size / 8 */
83
84 rep movsq /* copy as much as possible word by word */
85
86 movq MEMCPY_SIZE, %rcx
87 andq $7, %rcx /* size % 8 */
88 jz 0f
89
90 rep movsb /* copy the rest byte by byte */
91
92 0:
93 ret /* return MEMCPY_SRC, success */
94
95memcpy_from_uspace_failover_address:
96memcpy_to_uspace_failover_address:
97 xorq %rax, %rax /* return 0, failure */
98 ret
99
100/** Determine CPUID support
101*
102* @return 0 in EAX if CPUID is not support, 1 if supported.
103*
104*/
105has_cpuid:
106 /* Load RFLAGS */
107 pushfq
108 popq %rax
109 movq %rax, %rdx
110
111 /* Flip the ID bit */
112 btcl $21, %edx
113
114 /* Store RFLAGS */
115 pushq %rdx
116 popfq
117 pushfq
118
119 /* Get the ID bit again */
120 popq %rdx
121 andl $(1 << 21), %eax
122 andl $(1 << 21), %edx
123
124 /* 0 if not supported, 1 if supported */
125 xorl %edx, %eax
126 ret
127
128cpuid:
129 /* Preserve %rbx across function calls */
130 movq %rbx, %r10
131
132 /* Load the command into %eax */
133 movl %edi, %eax
134
135 cpuid
136 movl %eax, 0(%rsi)
137 movl %ebx, 4(%rsi)
138 movl %ecx, 8(%rsi)
139 movl %edx, 12(%rsi)
140
141 movq %r10, %rbx
142 ret
143
144set_efer_flag:
145 movq $0xc0000080, %rcx
146 rdmsr
147 btsl %edi, %eax
148 wrmsr
149 ret
150
151read_efer_flag:
152 movq $0xc0000080, %rcx
153 rdmsr
154 ret
155
156#define ISTATE_OFFSET_RAX 0
157#define ISTATE_OFFSET_RBX 8
158#define ISTATE_OFFSET_RCX 16
159#define ISTATE_OFFSET_RDX 24
160#define ISTATE_OFFSET_RSI 32
161#define ISTATE_OFFSET_RDI 40
162#define ISTATE_OFFSET_RBP 48
163#define ISTATE_OFFSET_R8 56
164#define ISTATE_OFFSET_R9 64
165#define ISTATE_OFFSET_R10 72
166#define ISTATE_OFFSET_R11 80
167#define ISTATE_OFFSET_R12 88
168#define ISTATE_OFFSET_R13 96
169#define ISTATE_OFFSET_R14 104
170#define ISTATE_OFFSET_R15 112
171#define ISTATE_OFFSET_ALIGNMENT 120
172#define ISTATE_OFFSET_RBP_FRAME 128
173#define ISTATE_OFFSET_RIP_FRAME 136
174#define ISTATE_OFFSET_ERROR_WORD 144
175#define ISTATE_OFFSET_RIP 152
176#define ISTATE_OFFSET_CS 160
177#define ISTATE_OFFSET_RFLAGS 168
178#define ISTATE_OFFSET_RSP 176
179#define ISTATE_OFFSET_SS 184
180
181/*
182 * Size of the istate structure without the hardware-saved part and without the
183 * error word.
184 */
185#define ISTATE_SOFT_SIZE 144
186
187/**
188 * Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int
189 * has no error word and 1 means interrupt with error word
190 *
191 */
192#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
193
194#define INTERRUPT_ALIGN 256
195
196/** Declare interrupt handlers
197 *
198 * Declare interrupt handlers for n interrupt
199 * vectors starting at vector i.
200 *
201 * The handlers call exc_dispatch().
202 *
203 */
204.macro handler i n
205
206 /*
207 * Choose between version with error code and version without error
208 * code. Both versions have to be of the same size. amd64 assembly is,
209 * however, a little bit tricky. For instance, subq $0x80, %rsp and
210 * subq $0x78, %rsp can result in two instructions with different
211 * op-code lengths.
212 * Therefore we align the interrupt handlers.
213 */
214
215 .iflt \i-32
216 .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
217 /*
218 * Version with error word.
219 */
220 subq $ISTATE_SOFT_SIZE, %rsp
221 .else
222 /*
223 * Version without error word.
224 */
225 subq $(ISTATE_SOFT_SIZE + 8), %rsp
226 .endif
227 .else
228 /*
229 * Version without error word.
230 */
231 subq $(ISTATE_SOFT_SIZE + 8), %rsp
232 .endif
233
234 /*
235 * Save the general purpose registers.
236 */
237 movq %rax, ISTATE_OFFSET_RAX(%rsp)
238 movq %rbx, ISTATE_OFFSET_RBX(%rsp)
239 movq %rcx, ISTATE_OFFSET_RCX(%rsp)
240 movq %rdx, ISTATE_OFFSET_RDX(%rsp)
241 movq %rsi, ISTATE_OFFSET_RSI(%rsp)
242 movq %rdi, ISTATE_OFFSET_RDI(%rsp)
243 movq %rbp, ISTATE_OFFSET_RBP(%rsp)
244 movq %r8, ISTATE_OFFSET_R8(%rsp)
245 movq %r9, ISTATE_OFFSET_R9(%rsp)
246 movq %r10, ISTATE_OFFSET_R10(%rsp)
247 movq %r11, ISTATE_OFFSET_R11(%rsp)
248 movq %r12, ISTATE_OFFSET_R12(%rsp)
249 movq %r13, ISTATE_OFFSET_R13(%rsp)
250 movq %r14, ISTATE_OFFSET_R14(%rsp)
251 movq %r15, ISTATE_OFFSET_R15(%rsp)
252
253 /*
254 * Imitate a regular stack frame linkage.
255 * Stop stack traces here if we came from userspace.
256 */
257 xorq %rdx, %rdx
258 cmpq $(gdtselector(KTEXT_DES)), ISTATE_OFFSET_CS(%rsp)
259 cmovnzq %rdx, %rbp
260
261 movq %rbp, ISTATE_OFFSET_RBP_FRAME(%rsp)
262 movq ISTATE_OFFSET_RIP(%rsp), %rax
263 movq %rax, ISTATE_OFFSET_RIP_FRAME(%rsp)
264 leaq ISTATE_OFFSET_RBP_FRAME(%rsp), %rbp
265
266 movq $(\i), %rdi /* pass intnum in the first argument */
267 movq %rsp, %rsi /* pass istate address in the second argument */
268
269 cld
270
271 /* Call exc_dispatch(i, istate) */
272 call exc_dispatch
273
274 /*
275 * Restore all scratch registers and the preserved registers we have
276 * clobbered in this handler (i.e. RBP).
277 */
278 movq ISTATE_OFFSET_RAX(%rsp), %rax
279 movq ISTATE_OFFSET_RCX(%rsp), %rcx
280 movq ISTATE_OFFSET_RDX(%rsp), %rdx
281 movq ISTATE_OFFSET_RSI(%rsp), %rsi
282 movq ISTATE_OFFSET_RDI(%rsp), %rdi
283 movq ISTATE_OFFSET_RBP(%rsp), %rbp
284 movq ISTATE_OFFSET_R8(%rsp), %r8
285 movq ISTATE_OFFSET_R9(%rsp), %r9
286 movq ISTATE_OFFSET_R10(%rsp), %r10
287 movq ISTATE_OFFSET_R11(%rsp), %r11
288
289 /* $8 = Skip error word */
290 addq $(ISTATE_SOFT_SIZE + 8), %rsp
291 iretq
292
293 .align INTERRUPT_ALIGN
294 .if (\n - \i) - 1
295 handler "(\i + 1)", \n
296 .endif
297.endm
298
299.align INTERRUPT_ALIGN
300interrupt_handlers:
301 h_start:
302 handler 0 IDT_ITEMS
303 h_end:
304
305/** Low-level syscall handler
306 *
307 * Registers on entry:
308 *
309 * @param %rcx Userspace return address.
310 * @param %r11 Userspace RLFAGS.
311 *
312 * @param %rax Syscall number.
313 * @param %rdi 1st syscall argument.
314 * @param %rsi 2nd syscall argument.
315 * @param %rdx 3rd syscall argument.
316 * @param %r10 4th syscall argument. Used instead of RCX because
317 * the SYSCALL instruction clobbers it.
318 * @param %r8 5th syscall argument.
319 * @param %r9 6th syscall argument.
320 *
321 * @return Return value is in %rax.
322 *
323 */
324syscall_entry:
325 /* Switch to hidden %gs */
326 swapgs
327
328 /*
329 * %gs:0 Scratch space for this thread's user RSP
330 * %gs:8 Address to be used as this thread's kernel RSP
331 */
332
333 movq %rsp, %gs:0 /* save this thread's user RSP */
334 movq %gs:8, %rsp /* set this thread's kernel RSP */
335
336 /* Switch back to remain consistent */
337 swapgs
338 sti
339
340 pushq %rcx
341 pushq %r11
342 pushq %rbp
343
344 xorq %rbp, %rbp /* stop the stack traces here */
345
346 /* Copy the 4th argument where it is expected */
347 movq %r10, %rcx
348 pushq %rax
349
350 call syscall_handler
351
352 addq $8, %rsp
353
354 popq %rbp
355 popq %r11
356 popq %rcx
357
358 cli
359 swapgs
360
361 /* Restore the user RSP */
362 movq %gs:0, %rsp
363 swapgs
364
365 sysretq
366
367/** Print Unicode character to EGA display.
368 *
369 * If CONFIG_EGA is undefined or CONFIG_FB is defined
370 * then this function does nothing.
371 *
372 * Since the EGA can only display Extended ASCII (usually
373 * ISO Latin 1) characters, some of the Unicode characters
374 * can be displayed in a wrong way. Only newline and backspace
375 * are interpreted, all other characters (even unprintable) are
376 * printed verbatim.
377 *
378 * @param %rdi Unicode character to be printed.
379 *
380 */
381early_putchar:
382
383#if ((defined(CONFIG_EGA)) && (!defined(CONFIG_FB)))
384
385 /* Prologue, save preserved registers */
386 pushq %rbp
387 movq %rsp, %rbp
388 pushq %rbx
389
390 movq %rdi, %rsi
391 movq $(PA2KA(0xb8000)), %rdi /* base of EGA text mode memory */
392 xorq %rax, %rax
393
394 /* Read bits 8 - 15 of the cursor address */
395 movw $0x3d4, %dx
396 movb $0xe, %al
397 outb %al, %dx
398
399 movw $0x3d5, %dx
400 inb %dx, %al
401 shl $8, %ax
402
403 /* Read bits 0 - 7 of the cursor address */
404 movw $0x3d4, %dx
405 movb $0xf, %al
406 outb %al, %dx
407
408 movw $0x3d5, %dx
409 inb %dx, %al
410
411 /* Sanity check for the cursor on screen */
412 cmp $2000, %ax
413 jb early_putchar_cursor_ok
414
415 movw $1998, %ax
416
417 early_putchar_cursor_ok:
418
419 movw %ax, %bx
420 shl $1, %rax
421 addq %rax, %rdi
422
423 movq %rsi, %rax
424
425 cmp $0x0a, %al
426 jne early_putchar_backspace
427
428 /* Interpret newline */
429
430 movw %bx, %ax /* %bx -> %dx:%ax */
431 xorw %dx, %dx
432
433 movw $80, %cx
434 idivw %cx, %ax /* %dx = %bx % 80 */
435
436 /* %bx <- %bx + 80 - (%bx % 80) */
437 addw %cx, %bx
438 subw %dx, %bx
439
440 jmp early_putchar_skip
441
442 early_putchar_backspace:
443
444 cmp $0x08, %al
445 jne early_putchar_print
446
447 /* Interpret backspace */
448
449 cmp $0x0000, %bx
450 je early_putchar_skip
451
452 dec %bx
453 jmp early_putchar_skip
454
455 early_putchar_print:
456
457 /* Print character */
458
459 movb $0x0e, %ah /* black background, yellow foreground */
460 stosw
461 inc %bx
462
463 early_putchar_skip:
464
465 /* Sanity check for the cursor on the last line */
466 cmp $2000, %bx
467 jb early_putchar_no_scroll
468
469 /* Scroll the screen (24 rows) */
470 movq $(PA2KA(0xb80a0)), %rsi
471 movq $(PA2KA(0xb8000)), %rdi
472 movq $480, %rcx
473 rep movsq
474
475 /* Clear the 24th row */
476 xorq %rax, %rax
477 movq $20, %rcx
478 rep stosq
479
480 /* Go to row 24 */
481 movw $1920, %bx
482
483 early_putchar_no_scroll:
484
485 /* Write bits 8 - 15 of the cursor address */
486 movw $0x3d4, %dx
487 movb $0xe, %al
488 outb %al, %dx
489
490 movw $0x3d5, %dx
491 movb %bh, %al
492 outb %al, %dx
493
494 /* Write bits 0 - 7 of the cursor address */
495 movw $0x3d4, %dx
496 movb $0xf, %al
497 outb %al, %dx
498
499 movw $0x3d5, %dx
500 movb %bl, %al
501 outb %al, %dx
502
503 /* Epilogue, restore preserved registers */
504 popq %rbx
505 leave
506
507#endif
508
509 ret
510
511.data
512.global interrupt_handler_size
513
514interrupt_handler_size: .quad (h_end - h_start) / IDT_ITEMS
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