source: mainline/kernel/arch/amd64/src/asm.S@ 3b0f1b9a

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 3b0f1b9a was 3b0f1b9a, checked in by Jakub Jermar <jakub@…>, 9 years ago

amd64: use asmtool.h macros for defining symbols
  • Property mode set to 100644
File size: 12.5 KB
Line 
1/*
2 * Copyright (c) 2005 Ondrej Palkovsky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <abi/asmtool.h>
30#include <arch/pm.h>
31#include <arch/mm/page.h>
32#include <arch/istate_struct.h>
33
34.text
35
36#define MEMCPY_DST %rdi
37#define MEMCPY_SRC %rsi
38#define MEMCPY_SIZE %rdx
39
40/**
41 * Copy memory from/to userspace.
42 *
43 * This is almost conventional memcpy().
44 * The difference is that there is a failover part
45 * to where control is returned from a page fault if
46 * the page fault occurs during copy_from_uspace()
47 * or copy_to_uspace().
48 *
49 * @param MEMCPY_DST Destination address.
50 * @param MEMCPY_SRC Source address.
51 * @param MEMCPY_SIZE Number of bytes to copy.
52 *
53 * @retrun MEMCPY_DST on success, 0 on failure.
54 *
55 */
56FUNCTION_BEGIN(memcpy_from_uspace)
57FUNCTION_BEGIN(memcpy_to_uspace)
58 movq MEMCPY_DST, %rax
59
60 movq MEMCPY_SIZE, %rcx
61 shrq $3, %rcx /* size / 8 */
62
63 rep movsq /* copy as much as possible word by word */
64
65 movq MEMCPY_SIZE, %rcx
66 andq $7, %rcx /* size % 8 */
67 jz 0f
68
69 rep movsb /* copy the rest byte by byte */
70
71 0:
72 ret /* return MEMCPY_SRC, success */
73FUNCTION_END(memcpy_from_uspace)
74FUNCTION_END(memcpy_to_uspace)
75
76SYMBOL(memcpy_from_uspace_failover_address)
77SYMBOL(memcpy_to_uspace_failover_address)
78 xorl %eax, %eax /* return 0, failure */
79 ret
80
81/** Determine CPUID support
82*
83* @return 0 in EAX if CPUID is not support, 1 if supported.
84*
85*/
86FUNCTION_BEGIN(has_cpuid)
87 /* Load RFLAGS */
88 pushfq
89 popq %rax
90 movq %rax, %rdx
91
92 /* Flip the ID bit */
93 btcl $21, %edx
94
95 /* Store RFLAGS */
96 pushq %rdx
97 popfq
98 pushfq
99
100 /* Get the ID bit again */
101 popq %rdx
102 andl $(1 << 21), %eax
103 andl $(1 << 21), %edx
104
105 /* 0 if not supported, 1 if supported */
106 xorl %edx, %eax
107 ret
108FUNCTION_END(has_cpuid)
109
110FUNCTION_BEGIN(cpuid)
111 /* Preserve %rbx across function calls */
112 movq %rbx, %r10
113
114 /* Load the command into %eax */
115 movl %edi, %eax
116
117 cpuid
118 movl %eax, 0(%rsi)
119 movl %ebx, 4(%rsi)
120 movl %ecx, 8(%rsi)
121 movl %edx, 12(%rsi)
122
123 movq %r10, %rbx
124 ret
125FUNCTION_END(cpuid)
126
127FUNCTION_BEGIN(set_efer_flag)
128 movl $0xc0000080, %ecx
129 rdmsr
130 btsl %edi, %eax
131 wrmsr
132 ret
133FUNCTION_END(set_efer_flag)
134
135FUNCTION_BEGIN(read_efer_flag)
136 movl $0xc0000080, %ecx
137 rdmsr
138 ret
139FUNCTION_END(read_efer_flag)
140
141/*
142 * Size of the istate structure without the hardware-saved part and without the
143 * error word.
144 */
145#define ISTATE_SOFT_SIZE ISTATE_SIZE - (6 * 8)
146
147/**
148 * Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int
149 * has no error word and 1 means interrupt with error word
150 *
151 */
152#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
153
154.macro handler i
155SYMBOL(int_\i)
156
157 /*
158 * Choose between version with error code and version without error
159 * code.
160 */
161
162 .iflt \i-32
163 .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
164 /*
165 * Version with error word.
166 */
167 subq $ISTATE_SOFT_SIZE, %rsp
168 .else
169 /*
170 * Version without error word.
171 */
172 subq $(ISTATE_SOFT_SIZE + 8), %rsp
173 .endif
174 .else
175 /*
176 * Version without error word.
177 */
178 subq $(ISTATE_SOFT_SIZE + 8), %rsp
179 .endif
180
181 /*
182 * Save the general purpose registers.
183 */
184 movq %rax, ISTATE_OFFSET_RAX(%rsp)
185 movq %rbx, ISTATE_OFFSET_RBX(%rsp)
186 movq %rcx, ISTATE_OFFSET_RCX(%rsp)
187 movq %rdx, ISTATE_OFFSET_RDX(%rsp)
188 movq %rsi, ISTATE_OFFSET_RSI(%rsp)
189 movq %rdi, ISTATE_OFFSET_RDI(%rsp)
190 movq %rbp, ISTATE_OFFSET_RBP(%rsp)
191 movq %r8, ISTATE_OFFSET_R8(%rsp)
192 movq %r9, ISTATE_OFFSET_R9(%rsp)
193 movq %r10, ISTATE_OFFSET_R10(%rsp)
194 movq %r11, ISTATE_OFFSET_R11(%rsp)
195 movq %r12, ISTATE_OFFSET_R12(%rsp)
196 movq %r13, ISTATE_OFFSET_R13(%rsp)
197 movq %r14, ISTATE_OFFSET_R14(%rsp)
198 movq %r15, ISTATE_OFFSET_R15(%rsp)
199
200 /*
201 * Imitate a regular stack frame linkage.
202 * Stop stack traces here if we came from userspace.
203 */
204 xorl %edx, %edx
205 cmpq $(GDT_SELECTOR(KTEXT_DES)), ISTATE_OFFSET_CS(%rsp)
206 cmovnzq %rdx, %rbp
207
208 movq %rbp, ISTATE_OFFSET_RBP_FRAME(%rsp)
209 movq ISTATE_OFFSET_RIP(%rsp), %rax
210 movq %rax, ISTATE_OFFSET_RIP_FRAME(%rsp)
211 leaq ISTATE_OFFSET_RBP_FRAME(%rsp), %rbp
212
213 movq $(\i), %rdi /* pass intnum in the first argument */
214 movq %rsp, %rsi /* pass istate address in the second argument */
215
216 cld
217
218 /* Call exc_dispatch(i, istate) */
219 call exc_dispatch
220
221 /*
222 * Restore all scratch registers and the preserved registers we have
223 * clobbered in this handler (i.e. RBP).
224 */
225 movq ISTATE_OFFSET_RAX(%rsp), %rax
226 movq ISTATE_OFFSET_RCX(%rsp), %rcx
227 movq ISTATE_OFFSET_RDX(%rsp), %rdx
228 movq ISTATE_OFFSET_RSI(%rsp), %rsi
229 movq ISTATE_OFFSET_RDI(%rsp), %rdi
230 movq ISTATE_OFFSET_RBP(%rsp), %rbp
231 movq ISTATE_OFFSET_R8(%rsp), %r8
232 movq ISTATE_OFFSET_R9(%rsp), %r9
233 movq ISTATE_OFFSET_R10(%rsp), %r10
234 movq ISTATE_OFFSET_R11(%rsp), %r11
235
236 /* $8 = Skip error word */
237 addq $(ISTATE_SOFT_SIZE + 8), %rsp
238 iretq
239.endm
240
241#define LIST_0_63 \
242 0, 1, 2, 3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,\
243 28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,\
244 53,54,55,56,57,58,59,60,61,62,63
245
246SYMBOL(interrupt_handlers)
247.irp cnt, LIST_0_63
248 handler \cnt
249.endr
250
251/** Low-level syscall handler
252 *
253 * Registers on entry:
254 *
255 * @param %rcx Userspace return address.
256 * @param %r11 Userspace RLFAGS.
257 *
258 * @param %rax Syscall number.
259 * @param %rdi 1st syscall argument.
260 * @param %rsi 2nd syscall argument.
261 * @param %rdx 3rd syscall argument.
262 * @param %r10 4th syscall argument. Used instead of RCX because
263 * the SYSCALL instruction clobbers it.
264 * @param %r8 5th syscall argument.
265 * @param %r9 6th syscall argument.
266 *
267 * @return Return value is in %rax.
268 *
269 */
270SYMBOL(syscall_entry)
271 /* Switch to hidden %gs */
272 swapgs
273
274 /*
275 * %gs:0 Scratch space for this thread's user RSP
276 * %gs:8 Address to be used as this thread's kernel RSP
277 */
278
279 movq %rsp, %gs:0 /* save this thread's user RSP */
280 movq %gs:8, %rsp /* set this thread's kernel RSP */
281
282 /*
283 * Note that the space needed for the imitated istate structure has been
284 * preallocated for us in thread_create_arch() and set in
285 * before_thread_runs_arch().
286 */
287
288 /*
289 * Save the general purpose registers and push the 7th argument (syscall
290 * number) onto the stack. Note that the istate structure has a layout
291 * which supports this.
292 */
293 movq %rax, ISTATE_OFFSET_RAX(%rsp) /* 7th argument, passed on stack */
294 movq %rbx, ISTATE_OFFSET_RBX(%rsp) /* observability */
295 movq %rcx, ISTATE_OFFSET_RCX(%rsp) /* userspace RIP */
296 movq %rdx, ISTATE_OFFSET_RDX(%rsp) /* 3rd argument, observability */
297 movq %rsi, ISTATE_OFFSET_RSI(%rsp) /* 2nd argument, observability */
298 movq %rdi, ISTATE_OFFSET_RDI(%rsp) /* 1st argument, observability */
299 movq %rbp, ISTATE_OFFSET_RBP(%rsp) /* need to preserve userspace RBP */
300 movq %r8, ISTATE_OFFSET_R8(%rsp) /* 5th argument, observability */
301 movq %r9, ISTATE_OFFSET_R9(%rsp) /* 6th argument, observability */
302 movq %r10, ISTATE_OFFSET_R10(%rsp) /* 4th argument, observability */
303 movq %r11, ISTATE_OFFSET_R11(%rsp) /* low 32 bits userspace RFLAGS */
304 movq %r12, ISTATE_OFFSET_R12(%rsp) /* observability */
305 movq %r13, ISTATE_OFFSET_R13(%rsp) /* observability */
306 movq %r14, ISTATE_OFFSET_R14(%rsp) /* observability */
307 movq %r15, ISTATE_OFFSET_R15(%rsp) /* observability */
308
309 /*
310 * Save the return address and the userspace stack on locations that
311 * would normally be taken by them.
312 */
313 movq %gs:0, %rax
314 movq %rax, ISTATE_OFFSET_RSP(%rsp)
315 movq %rcx, ISTATE_OFFSET_RIP(%rsp)
316
317 /*
318 * Imitate a regular stack frame linkage.
319 */
320 movq $0, ISTATE_OFFSET_RBP_FRAME(%rsp)
321 movq %rcx, ISTATE_OFFSET_RIP_FRAME(%rsp)
322 leaq ISTATE_OFFSET_RBP_FRAME(%rsp), %rbp
323
324 /* Switch back to normal %gs */
325 swapgs
326 sti
327
328 /* Copy the 4th argument where it is expected */
329 movq %r10, %rcx
330
331 /*
332 * Call syscall_handler() with the 7th argument passed on stack.
333 */
334 call syscall_handler
335
336 /*
337 * Test if the saved return address is canonical and not-kernel.
338 * We do this by looking at the 16 most significant bits
339 * of the saved return address (two bytes at offset 6).
340 */
341 testw $0xffff, ISTATE_OFFSET_RIP+6(%rsp)
342 jnz bad_rip
343
344 cli
345
346 /*
347 * Restore registers needed for return via the SYSRET instruction and
348 * the clobbered preserved registers (i.e. RBP).
349 */
350 movq ISTATE_OFFSET_RBP(%rsp), %rbp
351 movq ISTATE_OFFSET_RCX(%rsp), %rcx
352 movq ISTATE_OFFSET_R11(%rsp), %r11
353 movq ISTATE_OFFSET_RSP(%rsp), %rsp
354
355 /*
356 * Clear the rest of the scratch registers to prevent information leak.
357 * The 32-bit XOR on the low GPRs actually clears the entire 64-bit
358 * register and the instruction is shorter.
359 */
360 xorl %edx, %edx
361 xorl %esi, %esi
362 xorl %edi, %edi
363 xorq %r8, %r8
364 xorq %r9, %r9
365 xorq %r10, %r10
366
367 sysretq
368
369bad_rip:
370 movq %rsp, %rdi
371 movabs $bad_rip_msg, %rsi
372 xorb %al, %al
373 callq fault_from_uspace
374 /* not reached */
375
376bad_rip_msg:
377 .asciz "Invalid instruction pointer."
378
379/** Print Unicode character to EGA display.
380 *
381 * If CONFIG_EGA is undefined or CONFIG_FB is defined
382 * then this function does nothing.
383 *
384 * Since the EGA can only display Extended ASCII (usually
385 * ISO Latin 1) characters, some of the Unicode characters
386 * can be displayed in a wrong way. Only newline and backspace
387 * are interpreted, all other characters (even unprintable) are
388 * printed verbatim.
389 *
390 * @param %rdi Unicode character to be printed.
391 *
392 */
393FUNCTION_BEGIN(early_putchar)
394#if ((defined(CONFIG_EGA)) && (!defined(CONFIG_FB)))
395
396 /* Prologue, save preserved registers */
397 pushq %rbp
398 movq %rsp, %rbp
399 pushq %rbx
400
401 movq %rdi, %rsi
402 movq $(PA2KA(0xb8000)), %rdi /* base of EGA text mode memory */
403 xorl %eax, %eax
404
405 /* Read bits 8 - 15 of the cursor address */
406 movw $0x3d4, %dx
407 movb $0xe, %al
408 outb %al, %dx
409
410 movw $0x3d5, %dx
411 inb %dx, %al
412 shl $8, %ax
413
414 /* Read bits 0 - 7 of the cursor address */
415 movw $0x3d4, %dx
416 movb $0xf, %al
417 outb %al, %dx
418
419 movw $0x3d5, %dx
420 inb %dx, %al
421
422 /* Sanity check for the cursor on screen */
423 cmp $2000, %ax
424 jb early_putchar_cursor_ok
425
426 movw $1998, %ax
427
428 early_putchar_cursor_ok:
429
430 movw %ax, %bx
431 shl $1, %rax
432 addq %rax, %rdi
433
434 movq %rsi, %rax
435
436 cmp $0x0a, %al
437 jne early_putchar_backspace
438
439 /* Interpret newline */
440
441 movw %bx, %ax /* %bx -> %dx:%ax */
442 xorw %dx, %dx
443
444 movw $80, %cx
445 idivw %cx, %ax /* %dx = %bx % 80 */
446
447 /* %bx <- %bx + 80 - (%bx % 80) */
448 addw %cx, %bx
449 subw %dx, %bx
450
451 jmp early_putchar_skip
452
453 early_putchar_backspace:
454
455 cmp $0x08, %al
456 jne early_putchar_print
457
458 /* Interpret backspace */
459
460 cmp $0x0000, %bx
461 je early_putchar_skip
462
463 dec %bx
464 jmp early_putchar_skip
465
466 early_putchar_print:
467
468 /* Print character */
469
470 movb $0x0e, %ah /* black background, yellow foreground */
471 stosw
472 inc %bx
473
474 early_putchar_skip:
475
476 /* Sanity check for the cursor on the last line */
477 cmp $2000, %bx
478 jb early_putchar_no_scroll
479
480 /* Scroll the screen (24 rows) */
481 movq $(PA2KA(0xb80a0)), %rsi
482 movq $(PA2KA(0xb8000)), %rdi
483 movl $480, %ecx
484 rep movsq
485
486 /* Clear the 24th row */
487 xorl %eax, %eax
488 movl $20, %ecx
489 rep stosq
490
491 /* Go to row 24 */
492 movw $1920, %bx
493
494 early_putchar_no_scroll:
495
496 /* Write bits 8 - 15 of the cursor address */
497 movw $0x3d4, %dx
498 movb $0xe, %al
499 outb %al, %dx
500
501 movw $0x3d5, %dx
502 movb %bh, %al
503 outb %al, %dx
504
505 /* Write bits 0 - 7 of the cursor address */
506 movw $0x3d4, %dx
507 movb $0xf, %al
508 outb %al, %dx
509
510 movw $0x3d5, %dx
511 movb %bl, %al
512 outb %al, %dx
513
514 /* Epilogue, restore preserved registers */
515 popq %rbx
516 leave
517
518#endif
519
520 ret
521FUNCTION_END(early_putchar)
522
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