source: mainline/kernel/arch/amd64/src/asm.S@ d9f53877

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d9f53877 was cb4f078, checked in by Martin Decky <martin@…>, 15 years ago

unify kernel byte string implementations
  • Property mode set to 100644
File size: 12.7 KB
RevLine 
[64bbf13]1/*
2 * Copyright (c) 2005 Ondrej Palkovsky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
[e3b9572]28
29#include <arch/pm.h>
[fa2d382]30#include <arch/mm/page.h>
[a1f60f3]31
[e3b9572]32.text
33.global interrupt_handlers
[dd4d6b0]34.global syscall_entry
[36b209a]35.global cpuid
[7df54df]36.global has_cpuid
[89344d85]37.global read_efer_flag
38.global set_efer_flag
[e3c762cd]39.global memcpy_from_uspace
40.global memcpy_to_uspace
41.global memcpy_from_uspace_failover_address
42.global memcpy_to_uspace_failover_address
[da52547]43.global early_putchar
[e3c762cd]44
[a1f60f3]45#define MEMCPY_DST %rdi
46#define MEMCPY_SRC %rsi
47#define MEMCPY_SIZE %rdx
[e3c762cd]48
49/**
50 * Copy memory from/to userspace.
51 *
52 * This is almost conventional memcpy().
53 * The difference is that there is a failover part
54 * to where control is returned from a page fault if
55 * the page fault occurs during copy_from_uspace()
56 * or copy_to_uspace().
57 *
[a1f60f3]58 * @param MEMCPY_DST Destination address.
59 * @param MEMCPY_SRC Source address.
60 * @param MEMCPY_SIZE Number of bytes to copy.
[e3c762cd]61 *
[da349da0]62 * @retrun MEMCPY_DST on success, 0 on failure.
[a1f60f3]63 *
[e3c762cd]64 */
65memcpy_from_uspace:
66memcpy_to_uspace:
[da349da0]67 movq MEMCPY_DST, %rax
[a1f60f3]68
[e3c762cd]69 movq MEMCPY_SIZE, %rcx
[a1f60f3]70 shrq $3, %rcx /* size / 8 */
71
72 rep movsq /* copy as much as possible word by word */
[e3c762cd]73
74 movq MEMCPY_SIZE, %rcx
[a1f60f3]75 andq $7, %rcx /* size % 8 */
[e3c762cd]76 jz 0f
77
[a1f60f3]78 rep movsb /* copy the rest byte by byte */
[89344d85]79
[a1f60f3]80 0:
81 ret /* return MEMCPY_SRC, success */
[e3c762cd]82
83memcpy_from_uspace_failover_address:
84memcpy_to_uspace_failover_address:
[e80329d6]85 xorl %eax, %eax /* return 0, failure */
[e3c762cd]86 ret
87
[64bbf13]88/** Determine CPUID support
89*
90* @return 0 in EAX if CPUID is not support, 1 if supported.
91*
92*/
[7df54df]93has_cpuid:
[64bbf13]94 /* Load RFLAGS */
95 pushfq
96 popq %rax
97 movq %rax, %rdx
98
99 /* Flip the ID bit */
100 btcl $21, %edx
101
102 /* Store RFLAGS */
[d6dcdd2e]103 pushq %rdx
[64bbf13]104 popfq
[7df54df]105 pushfq
[64bbf13]106
107 /* Get the ID bit again */
108 popq %rdx
109 andl $(1 << 21), %eax
[a1f60f3]110 andl $(1 << 21), %edx
[64bbf13]111
112 /* 0 if not supported, 1 if supported */
113 xorl %edx, %eax
[7df54df]114 ret
115
[89344d85]116cpuid:
[64bbf13]117 /* Preserve %rbx across function calls */
118 movq %rbx, %r10
[a1f60f3]119
[64bbf13]120 /* Load the command into %eax */
121 movl %edi, %eax
[a1f60f3]122
123 cpuid
124 movl %eax, 0(%rsi)
125 movl %ebx, 4(%rsi)
126 movl %ecx, 8(%rsi)
127 movl %edx, 12(%rsi)
128
[89344d85]129 movq %r10, %rbx
130 ret
[7df54df]131
[89344d85]132set_efer_flag:
[e80329d6]133 movl $0xc0000080, %ecx
[89344d85]134 rdmsr
135 btsl %edi, %eax
136 wrmsr
137 ret
[a1f60f3]138
[64bbf13]139read_efer_flag:
[e80329d6]140 movl $0xc0000080, %ecx
[89344d85]141 rdmsr
[a1f60f3]142 ret
[7df54df]143
[c0e9f3f]144#define ISTATE_OFFSET_RAX 0
145#define ISTATE_OFFSET_RBX 8
146#define ISTATE_OFFSET_RCX 16
147#define ISTATE_OFFSET_RDX 24
148#define ISTATE_OFFSET_RSI 32
149#define ISTATE_OFFSET_RDI 40
150#define ISTATE_OFFSET_RBP 48
151#define ISTATE_OFFSET_R8 56
152#define ISTATE_OFFSET_R9 64
153#define ISTATE_OFFSET_R10 72
154#define ISTATE_OFFSET_R11 80
155#define ISTATE_OFFSET_R12 88
156#define ISTATE_OFFSET_R13 96
157#define ISTATE_OFFSET_R14 104
158#define ISTATE_OFFSET_R15 112
159#define ISTATE_OFFSET_ALIGNMENT 120
160#define ISTATE_OFFSET_RBP_FRAME 128
161#define ISTATE_OFFSET_RIP_FRAME 136
162#define ISTATE_OFFSET_ERROR_WORD 144
163#define ISTATE_OFFSET_RIP 152
164#define ISTATE_OFFSET_CS 160
165#define ISTATE_OFFSET_RFLAGS 168
166#define ISTATE_OFFSET_RSP 176
167#define ISTATE_OFFSET_SS 184
168
169/*
170 * Size of the istate structure without the hardware-saved part and without the
171 * error word.
[64bbf13]172 */
[c0e9f3f]173#define ISTATE_SOFT_SIZE 144
[e3b9572]174
[c0e9f3f]175/**
176 * Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int
177 * has no error word and 1 means interrupt with error word
178 *
179 */
180#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
[8e0eb63]181
[f77e591d]182.macro handler i
183.global int_\i
184int_\i:
[a1f60f3]185
[8e0eb63]186 /*
[296426ad]187 * Choose between version with error code and version without error
[f77e591d]188 * code.
[8e0eb63]189 */
[a1f60f3]190
[8e0eb63]191 .iflt \i-32
192 .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
193 /*
194 * Version with error word.
195 */
[c0e9f3f]196 subq $ISTATE_SOFT_SIZE, %rsp
[8e0eb63]197 .else
198 /*
[c0e9f3f]199 * Version without error word.
[8e0eb63]200 */
[c0e9f3f]201 subq $(ISTATE_SOFT_SIZE + 8), %rsp
[8e0eb63]202 .endif
203 .else
204 /*
[c0e9f3f]205 * Version without error word.
[8e0eb63]206 */
[c0e9f3f]207 subq $(ISTATE_SOFT_SIZE + 8), %rsp
[a1f60f3]208 .endif
209
[64bbf13]210 /*
[c0e9f3f]211 * Save the general purpose registers.
212 */
213 movq %rax, ISTATE_OFFSET_RAX(%rsp)
214 movq %rbx, ISTATE_OFFSET_RBX(%rsp)
215 movq %rcx, ISTATE_OFFSET_RCX(%rsp)
216 movq %rdx, ISTATE_OFFSET_RDX(%rsp)
217 movq %rsi, ISTATE_OFFSET_RSI(%rsp)
218 movq %rdi, ISTATE_OFFSET_RDI(%rsp)
219 movq %rbp, ISTATE_OFFSET_RBP(%rsp)
220 movq %r8, ISTATE_OFFSET_R8(%rsp)
221 movq %r9, ISTATE_OFFSET_R9(%rsp)
222 movq %r10, ISTATE_OFFSET_R10(%rsp)
223 movq %r11, ISTATE_OFFSET_R11(%rsp)
224 movq %r12, ISTATE_OFFSET_R12(%rsp)
225 movq %r13, ISTATE_OFFSET_R13(%rsp)
226 movq %r14, ISTATE_OFFSET_R14(%rsp)
227 movq %r15, ISTATE_OFFSET_R15(%rsp)
228
229 /*
230 * Imitate a regular stack frame linkage.
[64bbf13]231 * Stop stack traces here if we came from userspace.
232 */
[e80329d6]233 xorl %edx, %edx
[1d3d2cf]234 cmpq $(GDT_SELECTOR(KTEXT_DES)), ISTATE_OFFSET_CS(%rsp)
[c0e9f3f]235 cmovnzq %rdx, %rbp
236
237 movq %rbp, ISTATE_OFFSET_RBP_FRAME(%rsp)
238 movq ISTATE_OFFSET_RIP(%rsp), %rax
239 movq %rax, ISTATE_OFFSET_RIP_FRAME(%rsp)
240 leaq ISTATE_OFFSET_RBP_FRAME(%rsp), %rbp
[304342e]241
[c0e9f3f]242 movq $(\i), %rdi /* pass intnum in the first argument */
243 movq %rsp, %rsi /* pass istate address in the second argument */
[64bbf13]244
[c0e9f3f]245 cld
246
[64bbf13]247 /* Call exc_dispatch(i, istate) */
248 call exc_dispatch
[c0e9f3f]249
250 /*
251 * Restore all scratch registers and the preserved registers we have
252 * clobbered in this handler (i.e. RBP).
253 */
254 movq ISTATE_OFFSET_RAX(%rsp), %rax
255 movq ISTATE_OFFSET_RCX(%rsp), %rcx
256 movq ISTATE_OFFSET_RDX(%rsp), %rdx
257 movq ISTATE_OFFSET_RSI(%rsp), %rsi
258 movq ISTATE_OFFSET_RDI(%rsp), %rdi
259 movq ISTATE_OFFSET_RBP(%rsp), %rbp
260 movq ISTATE_OFFSET_R8(%rsp), %r8
261 movq ISTATE_OFFSET_R9(%rsp), %r9
262 movq ISTATE_OFFSET_R10(%rsp), %r10
263 movq ISTATE_OFFSET_R11(%rsp), %r11
[64bbf13]264
265 /* $8 = Skip error word */
[c0e9f3f]266 addq $(ISTATE_SOFT_SIZE + 8), %rsp
[e3b9572]267 iretq
268.endm
[8d25b44]269
[f77e591d]270#define LIST_0_63 \
271 0, 1, 2, 3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,\
272 28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,\
273 53,54,55,56,57,58,59,60,61,62,63
274
[e3b9572]275interrupt_handlers:
[f77e591d]276.irp cnt, LIST_0_63
277 handler \cnt
278.endr
[dd4d6b0]279
[64bbf13]280/** Low-level syscall handler
281 *
282 * Registers on entry:
283 *
284 * @param %rcx Userspace return address.
285 * @param %r11 Userspace RLFAGS.
286 *
287 * @param %rax Syscall number.
288 * @param %rdi 1st syscall argument.
289 * @param %rsi 2nd syscall argument.
290 * @param %rdx 3rd syscall argument.
291 * @param %r10 4th syscall argument. Used instead of RCX because
292 * the SYSCALL instruction clobbers it.
293 * @param %r8 5th syscall argument.
294 * @param %r9 6th syscall argument.
295 *
296 * @return Return value is in %rax.
297 *
298 */
[dd4d6b0]299syscall_entry:
[64bbf13]300 /* Switch to hidden %gs */
301 swapgs
302
303 /*
304 * %gs:0 Scratch space for this thread's user RSP
305 * %gs:8 Address to be used as this thread's kernel RSP
306 */
307
308 movq %rsp, %gs:0 /* save this thread's user RSP */
309 movq %gs:8, %rsp /* set this thread's kernel RSP */
310
[a7220de]311 /*
312 * Note that the space needed for the imitated istate structure has been
313 * preallocated for us in thread_create_arch() and set in
314 * before_thread_runs_arch().
315 */
316
317 /*
318 * Save the general purpose registers and push the 7th argument (syscall
319 * number) onto the stack. Note that the istate structure has a layout
320 * which supports this.
321 */
322 movq %rax, ISTATE_OFFSET_RAX(%rsp) /* 7th argument, passed on stack */
323 movq %rbx, ISTATE_OFFSET_RBX(%rsp) /* observability */
324 movq %rcx, ISTATE_OFFSET_RCX(%rsp) /* userspace RIP */
325 movq %rdx, ISTATE_OFFSET_RDX(%rsp) /* 3rd argument, observability */
326 movq %rsi, ISTATE_OFFSET_RSI(%rsp) /* 2nd argument, observability */
327 movq %rdi, ISTATE_OFFSET_RDI(%rsp) /* 1st argument, observability */
328 movq %rbp, ISTATE_OFFSET_RBP(%rsp) /* need to preserve userspace RBP */
329 movq %r8, ISTATE_OFFSET_R8(%rsp) /* 5th argument, observability */
330 movq %r9, ISTATE_OFFSET_R9(%rsp) /* 6th argument, observability */
331 movq %r10, ISTATE_OFFSET_R10(%rsp) /* 4th argument, observability */
332 movq %r11, ISTATE_OFFSET_R11(%rsp) /* low 32 bits userspace RFLAGS */
333 movq %r12, ISTATE_OFFSET_R12(%rsp) /* observability */
334 movq %r13, ISTATE_OFFSET_R13(%rsp) /* observability */
335 movq %r14, ISTATE_OFFSET_R14(%rsp) /* observability */
336 movq %r15, ISTATE_OFFSET_R15(%rsp) /* observability */
337
338 /*
339 * Save the return address and the userspace stack on locations that
340 * would normally be taken by them.
341 */
342 movq %gs:0, %rax
343 movq %rax, ISTATE_OFFSET_RSP(%rsp)
344 movq %rcx, ISTATE_OFFSET_RIP(%rsp)
345
346 /*
347 * Imitate a regular stack frame linkage.
348 */
349 movq $0, ISTATE_OFFSET_RBP_FRAME(%rsp)
350 movq %rcx, ISTATE_OFFSET_RIP_FRAME(%rsp)
351 leaq ISTATE_OFFSET_RBP_FRAME(%rsp), %rbp
352
353 /* Switch back to normal %gs */
[64bbf13]354 swapgs
[6d9c49a]355 sti
[c7c0b89b]356
[64bbf13]357 /* Copy the 4th argument where it is expected */
358 movq %r10, %rcx
[a7220de]359
360 /*
361 * Call syscall_handler() with the 7th argument passed on stack.
362 */
[dd4d6b0]363 call syscall_handler
[64bbf13]364
[296426ad]365 cli
[a1f60f3]366
[a7220de]367 /*
368 * Restore registers needed for return via the SYSRET instruction and
369 * the clobbered preserved registers (i.e. RBP).
370 */
371 movq ISTATE_OFFSET_RBP(%rsp), %rbp
372 movq ISTATE_OFFSET_RCX(%rsp), %rcx
373 movq ISTATE_OFFSET_R11(%rsp), %r11
374 movq ISTATE_OFFSET_RSP(%rsp), %rsp
375
[4f35b9ff]376 /*
377 * Clear the rest of the scratch registers to prevent information leak.
378 * The 32-bit XOR on the low GPRs actually clears the entire 64-bit
379 * register and the instruction is shorter.
380 */
381 xorl %edx, %edx
382 xorl %esi, %esi
383 xorl %edi, %edi
384 xorq %r8, %r8
385 xorq %r9, %r9
386 xorq %r10, %r10
387
[37b451f7]388 sysretq
[296426ad]389
[da52547]390/** Print Unicode character to EGA display.
391 *
392 * If CONFIG_EGA is undefined or CONFIG_FB is defined
393 * then this function does nothing.
394 *
395 * Since the EGA can only display Extended ASCII (usually
396 * ISO Latin 1) characters, some of the Unicode characters
[ca8f84f]397 * can be displayed in a wrong way. Only newline and backspace
398 * are interpreted, all other characters (even unprintable) are
[da52547]399 * printed verbatim.
400 *
401 * @param %rdi Unicode character to be printed.
402 *
403 */
404early_putchar:
405
406#if ((defined(CONFIG_EGA)) && (!defined(CONFIG_FB)))
407
408 /* Prologue, save preserved registers */
409 pushq %rbp
410 movq %rsp, %rbp
411 pushq %rbx
412
413 movq %rdi, %rsi
414 movq $(PA2KA(0xb8000)), %rdi /* base of EGA text mode memory */
[e80329d6]415 xorl %eax, %eax
[da52547]416
417 /* Read bits 8 - 15 of the cursor address */
418 movw $0x3d4, %dx
419 movb $0xe, %al
420 outb %al, %dx
421
422 movw $0x3d5, %dx
423 inb %dx, %al
424 shl $8, %ax
425
426 /* Read bits 0 - 7 of the cursor address */
427 movw $0x3d4, %dx
428 movb $0xf, %al
429 outb %al, %dx
430
431 movw $0x3d5, %dx
432 inb %dx, %al
433
434 /* Sanity check for the cursor on screen */
435 cmp $2000, %ax
436 jb early_putchar_cursor_ok
437
438 movw $1998, %ax
439
440 early_putchar_cursor_ok:
441
442 movw %ax, %bx
443 shl $1, %rax
444 addq %rax, %rdi
445
446 movq %rsi, %rax
447
448 cmp $0x0a, %al
[ca8f84f]449 jne early_putchar_backspace
[da52547]450
451 /* Interpret newline */
452
453 movw %bx, %ax /* %bx -> %dx:%ax */
454 xorw %dx, %dx
455
456 movw $80, %cx
457 idivw %cx, %ax /* %dx = %bx % 80 */
458
459 /* %bx <- %bx + 80 - (%bx % 80) */
460 addw %cx, %bx
461 subw %dx, %bx
462
[ca8f84f]463 jmp early_putchar_skip
464
465 early_putchar_backspace:
466
467 cmp $0x08, %al
468 jne early_putchar_print
469
470 /* Interpret backspace */
471
472 cmp $0x0000, %bx
473 je early_putchar_skip
474
475 dec %bx
476 jmp early_putchar_skip
[da52547]477
478 early_putchar_print:
479
480 /* Print character */
481
482 movb $0x0e, %ah /* black background, yellow foreground */
483 stosw
[b5382d4f]484 inc %bx
[da52547]485
[ca8f84f]486 early_putchar_skip:
[da52547]487
488 /* Sanity check for the cursor on the last line */
489 cmp $2000, %bx
490 jb early_putchar_no_scroll
491
492 /* Scroll the screen (24 rows) */
493 movq $(PA2KA(0xb80a0)), %rsi
494 movq $(PA2KA(0xb8000)), %rdi
[e80329d6]495 movl $480, %ecx
[22c3444]496 rep movsq
[da52547]497
498 /* Clear the 24th row */
[e80329d6]499 xorl %eax, %eax
500 movl $20, %ecx
[22c3444]501 rep stosq
[da52547]502
503 /* Go to row 24 */
504 movw $1920, %bx
505
506 early_putchar_no_scroll:
507
508 /* Write bits 8 - 15 of the cursor address */
509 movw $0x3d4, %dx
510 movb $0xe, %al
511 outb %al, %dx
512
513 movw $0x3d5, %dx
514 movb %bh, %al
515 outb %al, %dx
516
517 /* Write bits 0 - 7 of the cursor address */
518 movw $0x3d4, %dx
519 movb $0xf, %al
520 outb %al, %dx
521
522 movw $0x3d5, %dx
523 movb %bl, %al
524 outb %al, %dx
525
526 /* Epilogue, restore preserved registers */
527 popq %rbx
528 leave
529
530#endif
531
532 ret
533
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