source: mainline/kernel/arch/amd64/src/asm.S@ c39544a

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since c39544a was e80329d6, checked in by Jakub Jermar <jakub@…>, 15 years ago

Use shorter 32-bit instructions where possible.
  • Property mode set to 100644
File size: 12.9 KB
RevLine 
[64bbf13]1/*
2 * Copyright (c) 2005 Ondrej Palkovsky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
[e3b9572]28
29#include <arch/pm.h>
[fa2d382]30#include <arch/mm/page.h>
[a1f60f3]31
[e3b9572]32.text
33.global interrupt_handlers
[dd4d6b0]34.global syscall_entry
[36b209a]35.global cpuid
[7df54df]36.global has_cpuid
[89344d85]37.global read_efer_flag
38.global set_efer_flag
[2b17f47]39.global memsetb
40.global memsetw
[e3c762cd]41.global memcpy
42.global memcpy_from_uspace
43.global memcpy_to_uspace
44.global memcpy_from_uspace_failover_address
45.global memcpy_to_uspace_failover_address
[da52547]46.global early_putchar
[e3c762cd]47
[64bbf13]48/* Wrapper for generic memsetb */
[2b17f47]49memsetb:
50 jmp _memsetb
51
[64bbf13]52/* Wrapper for generic memsetw */
[2b17f47]53memsetw:
54 jmp _memsetw
55
[a1f60f3]56#define MEMCPY_DST %rdi
57#define MEMCPY_SRC %rsi
58#define MEMCPY_SIZE %rdx
[e3c762cd]59
60/**
61 * Copy memory from/to userspace.
62 *
63 * This is almost conventional memcpy().
64 * The difference is that there is a failover part
65 * to where control is returned from a page fault if
66 * the page fault occurs during copy_from_uspace()
67 * or copy_to_uspace().
68 *
[a1f60f3]69 * @param MEMCPY_DST Destination address.
70 * @param MEMCPY_SRC Source address.
71 * @param MEMCPY_SIZE Number of bytes to copy.
[e3c762cd]72 *
[da349da0]73 * @retrun MEMCPY_DST on success, 0 on failure.
[a1f60f3]74 *
[e3c762cd]75 */
76memcpy:
77memcpy_from_uspace:
78memcpy_to_uspace:
[da349da0]79 movq MEMCPY_DST, %rax
[a1f60f3]80
[e3c762cd]81 movq MEMCPY_SIZE, %rcx
[a1f60f3]82 shrq $3, %rcx /* size / 8 */
83
84 rep movsq /* copy as much as possible word by word */
[e3c762cd]85
86 movq MEMCPY_SIZE, %rcx
[a1f60f3]87 andq $7, %rcx /* size % 8 */
[e3c762cd]88 jz 0f
89
[a1f60f3]90 rep movsb /* copy the rest byte by byte */
[89344d85]91
[a1f60f3]92 0:
93 ret /* return MEMCPY_SRC, success */
[e3c762cd]94
95memcpy_from_uspace_failover_address:
96memcpy_to_uspace_failover_address:
[e80329d6]97 xorl %eax, %eax /* return 0, failure */
[e3c762cd]98 ret
99
[64bbf13]100/** Determine CPUID support
101*
102* @return 0 in EAX if CPUID is not support, 1 if supported.
103*
104*/
[7df54df]105has_cpuid:
[64bbf13]106 /* Load RFLAGS */
107 pushfq
108 popq %rax
109 movq %rax, %rdx
110
111 /* Flip the ID bit */
112 btcl $21, %edx
113
114 /* Store RFLAGS */
[d6dcdd2e]115 pushq %rdx
[64bbf13]116 popfq
[7df54df]117 pushfq
[64bbf13]118
119 /* Get the ID bit again */
120 popq %rdx
121 andl $(1 << 21), %eax
[a1f60f3]122 andl $(1 << 21), %edx
[64bbf13]123
124 /* 0 if not supported, 1 if supported */
125 xorl %edx, %eax
[7df54df]126 ret
127
[89344d85]128cpuid:
[64bbf13]129 /* Preserve %rbx across function calls */
130 movq %rbx, %r10
[a1f60f3]131
[64bbf13]132 /* Load the command into %eax */
133 movl %edi, %eax
[a1f60f3]134
135 cpuid
136 movl %eax, 0(%rsi)
137 movl %ebx, 4(%rsi)
138 movl %ecx, 8(%rsi)
139 movl %edx, 12(%rsi)
140
[89344d85]141 movq %r10, %rbx
142 ret
[7df54df]143
[89344d85]144set_efer_flag:
[e80329d6]145 movl $0xc0000080, %ecx
[89344d85]146 rdmsr
147 btsl %edi, %eax
148 wrmsr
149 ret
[a1f60f3]150
[64bbf13]151read_efer_flag:
[e80329d6]152 movl $0xc0000080, %ecx
[89344d85]153 rdmsr
[a1f60f3]154 ret
[7df54df]155
[c0e9f3f]156#define ISTATE_OFFSET_RAX 0
157#define ISTATE_OFFSET_RBX 8
158#define ISTATE_OFFSET_RCX 16
159#define ISTATE_OFFSET_RDX 24
160#define ISTATE_OFFSET_RSI 32
161#define ISTATE_OFFSET_RDI 40
162#define ISTATE_OFFSET_RBP 48
163#define ISTATE_OFFSET_R8 56
164#define ISTATE_OFFSET_R9 64
165#define ISTATE_OFFSET_R10 72
166#define ISTATE_OFFSET_R11 80
167#define ISTATE_OFFSET_R12 88
168#define ISTATE_OFFSET_R13 96
169#define ISTATE_OFFSET_R14 104
170#define ISTATE_OFFSET_R15 112
171#define ISTATE_OFFSET_ALIGNMENT 120
172#define ISTATE_OFFSET_RBP_FRAME 128
173#define ISTATE_OFFSET_RIP_FRAME 136
174#define ISTATE_OFFSET_ERROR_WORD 144
175#define ISTATE_OFFSET_RIP 152
176#define ISTATE_OFFSET_CS 160
177#define ISTATE_OFFSET_RFLAGS 168
178#define ISTATE_OFFSET_RSP 176
179#define ISTATE_OFFSET_SS 184
180
181/*
182 * Size of the istate structure without the hardware-saved part and without the
183 * error word.
[64bbf13]184 */
[c0e9f3f]185#define ISTATE_SOFT_SIZE 144
[e3b9572]186
[c0e9f3f]187/**
188 * Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int
189 * has no error word and 1 means interrupt with error word
190 *
191 */
192#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
[8e0eb63]193
[f77e591d]194.macro handler i
195.global int_\i
196int_\i:
[a1f60f3]197
[8e0eb63]198 /*
[296426ad]199 * Choose between version with error code and version without error
[f77e591d]200 * code.
[8e0eb63]201 */
[a1f60f3]202
[8e0eb63]203 .iflt \i-32
204 .if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
205 /*
206 * Version with error word.
207 */
[c0e9f3f]208 subq $ISTATE_SOFT_SIZE, %rsp
[8e0eb63]209 .else
210 /*
[c0e9f3f]211 * Version without error word.
[8e0eb63]212 */
[c0e9f3f]213 subq $(ISTATE_SOFT_SIZE + 8), %rsp
[8e0eb63]214 .endif
215 .else
216 /*
[c0e9f3f]217 * Version without error word.
[8e0eb63]218 */
[c0e9f3f]219 subq $(ISTATE_SOFT_SIZE + 8), %rsp
[a1f60f3]220 .endif
221
[64bbf13]222 /*
[c0e9f3f]223 * Save the general purpose registers.
224 */
225 movq %rax, ISTATE_OFFSET_RAX(%rsp)
226 movq %rbx, ISTATE_OFFSET_RBX(%rsp)
227 movq %rcx, ISTATE_OFFSET_RCX(%rsp)
228 movq %rdx, ISTATE_OFFSET_RDX(%rsp)
229 movq %rsi, ISTATE_OFFSET_RSI(%rsp)
230 movq %rdi, ISTATE_OFFSET_RDI(%rsp)
231 movq %rbp, ISTATE_OFFSET_RBP(%rsp)
232 movq %r8, ISTATE_OFFSET_R8(%rsp)
233 movq %r9, ISTATE_OFFSET_R9(%rsp)
234 movq %r10, ISTATE_OFFSET_R10(%rsp)
235 movq %r11, ISTATE_OFFSET_R11(%rsp)
236 movq %r12, ISTATE_OFFSET_R12(%rsp)
237 movq %r13, ISTATE_OFFSET_R13(%rsp)
238 movq %r14, ISTATE_OFFSET_R14(%rsp)
239 movq %r15, ISTATE_OFFSET_R15(%rsp)
240
241 /*
242 * Imitate a regular stack frame linkage.
[64bbf13]243 * Stop stack traces here if we came from userspace.
244 */
[e80329d6]245 xorl %edx, %edx
[1d3d2cf]246 cmpq $(GDT_SELECTOR(KTEXT_DES)), ISTATE_OFFSET_CS(%rsp)
[c0e9f3f]247 cmovnzq %rdx, %rbp
248
249 movq %rbp, ISTATE_OFFSET_RBP_FRAME(%rsp)
250 movq ISTATE_OFFSET_RIP(%rsp), %rax
251 movq %rax, ISTATE_OFFSET_RIP_FRAME(%rsp)
252 leaq ISTATE_OFFSET_RBP_FRAME(%rsp), %rbp
[304342e]253
[c0e9f3f]254 movq $(\i), %rdi /* pass intnum in the first argument */
255 movq %rsp, %rsi /* pass istate address in the second argument */
[64bbf13]256
[c0e9f3f]257 cld
258
[64bbf13]259 /* Call exc_dispatch(i, istate) */
260 call exc_dispatch
[c0e9f3f]261
262 /*
263 * Restore all scratch registers and the preserved registers we have
264 * clobbered in this handler (i.e. RBP).
265 */
266 movq ISTATE_OFFSET_RAX(%rsp), %rax
267 movq ISTATE_OFFSET_RCX(%rsp), %rcx
268 movq ISTATE_OFFSET_RDX(%rsp), %rdx
269 movq ISTATE_OFFSET_RSI(%rsp), %rsi
270 movq ISTATE_OFFSET_RDI(%rsp), %rdi
271 movq ISTATE_OFFSET_RBP(%rsp), %rbp
272 movq ISTATE_OFFSET_R8(%rsp), %r8
273 movq ISTATE_OFFSET_R9(%rsp), %r9
274 movq ISTATE_OFFSET_R10(%rsp), %r10
275 movq ISTATE_OFFSET_R11(%rsp), %r11
[64bbf13]276
277 /* $8 = Skip error word */
[c0e9f3f]278 addq $(ISTATE_SOFT_SIZE + 8), %rsp
[e3b9572]279 iretq
280.endm
[8d25b44]281
[f77e591d]282#define LIST_0_63 \
283 0, 1, 2, 3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,\
284 28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,\
285 53,54,55,56,57,58,59,60,61,62,63
286
[e3b9572]287interrupt_handlers:
[f77e591d]288.irp cnt, LIST_0_63
289 handler \cnt
290.endr
[dd4d6b0]291
[64bbf13]292/** Low-level syscall handler
293 *
294 * Registers on entry:
295 *
296 * @param %rcx Userspace return address.
297 * @param %r11 Userspace RLFAGS.
298 *
299 * @param %rax Syscall number.
300 * @param %rdi 1st syscall argument.
301 * @param %rsi 2nd syscall argument.
302 * @param %rdx 3rd syscall argument.
303 * @param %r10 4th syscall argument. Used instead of RCX because
304 * the SYSCALL instruction clobbers it.
305 * @param %r8 5th syscall argument.
306 * @param %r9 6th syscall argument.
307 *
308 * @return Return value is in %rax.
309 *
310 */
[dd4d6b0]311syscall_entry:
[64bbf13]312 /* Switch to hidden %gs */
313 swapgs
314
315 /*
316 * %gs:0 Scratch space for this thread's user RSP
317 * %gs:8 Address to be used as this thread's kernel RSP
318 */
319
320 movq %rsp, %gs:0 /* save this thread's user RSP */
321 movq %gs:8, %rsp /* set this thread's kernel RSP */
322
[a7220de]323 /*
324 * Note that the space needed for the imitated istate structure has been
325 * preallocated for us in thread_create_arch() and set in
326 * before_thread_runs_arch().
327 */
328
329 /*
330 * Save the general purpose registers and push the 7th argument (syscall
331 * number) onto the stack. Note that the istate structure has a layout
332 * which supports this.
333 */
334 movq %rax, ISTATE_OFFSET_RAX(%rsp) /* 7th argument, passed on stack */
335 movq %rbx, ISTATE_OFFSET_RBX(%rsp) /* observability */
336 movq %rcx, ISTATE_OFFSET_RCX(%rsp) /* userspace RIP */
337 movq %rdx, ISTATE_OFFSET_RDX(%rsp) /* 3rd argument, observability */
338 movq %rsi, ISTATE_OFFSET_RSI(%rsp) /* 2nd argument, observability */
339 movq %rdi, ISTATE_OFFSET_RDI(%rsp) /* 1st argument, observability */
340 movq %rbp, ISTATE_OFFSET_RBP(%rsp) /* need to preserve userspace RBP */
341 movq %r8, ISTATE_OFFSET_R8(%rsp) /* 5th argument, observability */
342 movq %r9, ISTATE_OFFSET_R9(%rsp) /* 6th argument, observability */
343 movq %r10, ISTATE_OFFSET_R10(%rsp) /* 4th argument, observability */
344 movq %r11, ISTATE_OFFSET_R11(%rsp) /* low 32 bits userspace RFLAGS */
345 movq %r12, ISTATE_OFFSET_R12(%rsp) /* observability */
346 movq %r13, ISTATE_OFFSET_R13(%rsp) /* observability */
347 movq %r14, ISTATE_OFFSET_R14(%rsp) /* observability */
348 movq %r15, ISTATE_OFFSET_R15(%rsp) /* observability */
349
350 /*
351 * Save the return address and the userspace stack on locations that
352 * would normally be taken by them.
353 */
354 movq %gs:0, %rax
355 movq %rax, ISTATE_OFFSET_RSP(%rsp)
356 movq %rcx, ISTATE_OFFSET_RIP(%rsp)
357
358 /*
359 * Imitate a regular stack frame linkage.
360 */
361 movq $0, ISTATE_OFFSET_RBP_FRAME(%rsp)
362 movq %rcx, ISTATE_OFFSET_RIP_FRAME(%rsp)
363 leaq ISTATE_OFFSET_RBP_FRAME(%rsp), %rbp
364
365 /* Switch back to normal %gs */
[64bbf13]366 swapgs
[6d9c49a]367 sti
[c7c0b89b]368
[64bbf13]369 /* Copy the 4th argument where it is expected */
370 movq %r10, %rcx
[a7220de]371
372 /*
373 * Call syscall_handler() with the 7th argument passed on stack.
374 */
[dd4d6b0]375 call syscall_handler
[64bbf13]376
[296426ad]377 cli
[a1f60f3]378
[a7220de]379 /*
380 * Restore registers needed for return via the SYSRET instruction and
381 * the clobbered preserved registers (i.e. RBP).
382 */
383 movq ISTATE_OFFSET_RBP(%rsp), %rbp
384 movq ISTATE_OFFSET_RCX(%rsp), %rcx
385 movq ISTATE_OFFSET_R11(%rsp), %r11
386 movq ISTATE_OFFSET_RSP(%rsp), %rsp
387
[4f35b9ff]388 /*
389 * Clear the rest of the scratch registers to prevent information leak.
390 * The 32-bit XOR on the low GPRs actually clears the entire 64-bit
391 * register and the instruction is shorter.
392 */
393 xorl %edx, %edx
394 xorl %esi, %esi
395 xorl %edi, %edi
396 xorq %r8, %r8
397 xorq %r9, %r9
398 xorq %r10, %r10
399
[37b451f7]400 sysretq
[296426ad]401
[da52547]402/** Print Unicode character to EGA display.
403 *
404 * If CONFIG_EGA is undefined or CONFIG_FB is defined
405 * then this function does nothing.
406 *
407 * Since the EGA can only display Extended ASCII (usually
408 * ISO Latin 1) characters, some of the Unicode characters
[ca8f84f]409 * can be displayed in a wrong way. Only newline and backspace
410 * are interpreted, all other characters (even unprintable) are
[da52547]411 * printed verbatim.
412 *
413 * @param %rdi Unicode character to be printed.
414 *
415 */
416early_putchar:
417
418#if ((defined(CONFIG_EGA)) && (!defined(CONFIG_FB)))
419
420 /* Prologue, save preserved registers */
421 pushq %rbp
422 movq %rsp, %rbp
423 pushq %rbx
424
425 movq %rdi, %rsi
426 movq $(PA2KA(0xb8000)), %rdi /* base of EGA text mode memory */
[e80329d6]427 xorl %eax, %eax
[da52547]428
429 /* Read bits 8 - 15 of the cursor address */
430 movw $0x3d4, %dx
431 movb $0xe, %al
432 outb %al, %dx
433
434 movw $0x3d5, %dx
435 inb %dx, %al
436 shl $8, %ax
437
438 /* Read bits 0 - 7 of the cursor address */
439 movw $0x3d4, %dx
440 movb $0xf, %al
441 outb %al, %dx
442
443 movw $0x3d5, %dx
444 inb %dx, %al
445
446 /* Sanity check for the cursor on screen */
447 cmp $2000, %ax
448 jb early_putchar_cursor_ok
449
450 movw $1998, %ax
451
452 early_putchar_cursor_ok:
453
454 movw %ax, %bx
455 shl $1, %rax
456 addq %rax, %rdi
457
458 movq %rsi, %rax
459
460 cmp $0x0a, %al
[ca8f84f]461 jne early_putchar_backspace
[da52547]462
463 /* Interpret newline */
464
465 movw %bx, %ax /* %bx -> %dx:%ax */
466 xorw %dx, %dx
467
468 movw $80, %cx
469 idivw %cx, %ax /* %dx = %bx % 80 */
470
471 /* %bx <- %bx + 80 - (%bx % 80) */
472 addw %cx, %bx
473 subw %dx, %bx
474
[ca8f84f]475 jmp early_putchar_skip
476
477 early_putchar_backspace:
478
479 cmp $0x08, %al
480 jne early_putchar_print
481
482 /* Interpret backspace */
483
484 cmp $0x0000, %bx
485 je early_putchar_skip
486
487 dec %bx
488 jmp early_putchar_skip
[da52547]489
490 early_putchar_print:
491
492 /* Print character */
493
494 movb $0x0e, %ah /* black background, yellow foreground */
495 stosw
[b5382d4f]496 inc %bx
[da52547]497
[ca8f84f]498 early_putchar_skip:
[da52547]499
500 /* Sanity check for the cursor on the last line */
501 cmp $2000, %bx
502 jb early_putchar_no_scroll
503
504 /* Scroll the screen (24 rows) */
505 movq $(PA2KA(0xb80a0)), %rsi
506 movq $(PA2KA(0xb8000)), %rdi
[e80329d6]507 movl $480, %ecx
[22c3444]508 rep movsq
[da52547]509
510 /* Clear the 24th row */
[e80329d6]511 xorl %eax, %eax
512 movl $20, %ecx
[22c3444]513 rep stosq
[da52547]514
515 /* Go to row 24 */
516 movw $1920, %bx
517
518 early_putchar_no_scroll:
519
520 /* Write bits 8 - 15 of the cursor address */
521 movw $0x3d4, %dx
522 movb $0xe, %al
523 outb %al, %dx
524
525 movw $0x3d5, %dx
526 movb %bh, %al
527 outb %al, %dx
528
529 /* Write bits 0 - 7 of the cursor address */
530 movw $0x3d4, %dx
531 movb $0xf, %al
532 outb %al, %dx
533
534 movw $0x3d5, %dx
535 movb %bl, %al
536 outb %al, %dx
537
538 /* Epilogue, restore preserved registers */
539 popq %rbx
540 leave
541
542#endif
543
544 ret
545
Note: See TracBrowser for help on using the repository browser.