source: mainline/kernel/arch/amd64/src/amd64.c@ c22e964

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since c22e964 was f24d300, checked in by Martin Decky <martin@…>, 17 years ago

better inline assembler readability using the new symbolic syntax

  • Property mode set to 100644
File size: 5.3 KB
Line 
1/*
2 * Copyright (c) 2005 Ondrej Palkovsky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup amd64
30 * @{
31 */
32/** @file
33 */
34
35#include <arch.h>
36
37#include <arch/types.h>
38
39#include <config.h>
40
41#include <proc/thread.h>
42#include <genarch/drivers/legacy/ia32/io.h>
43#include <genarch/drivers/ega/ega.h>
44#include <arch/drivers/vesa.h>
45#include <genarch/kbd/i8042.h>
46#include <arch/drivers/i8254.h>
47#include <arch/drivers/i8259.h>
48
49#ifdef CONFIG_SMP
50#include <arch/smp/apic.h>
51#endif
52
53#include <arch/bios/bios.h>
54#include <arch/cpu.h>
55#include <print.h>
56#include <arch/cpuid.h>
57#include <genarch/acpi/acpi.h>
58#include <panic.h>
59#include <interrupt.h>
60#include <arch/syscall.h>
61#include <arch/debugger.h>
62#include <syscall/syscall.h>
63#include <console/console.h>
64#include <ddi/irq.h>
65#include <ddi/device.h>
66#include <sysinfo/sysinfo.h>
67
68
69/** Disable I/O on non-privileged levels
70 *
71 * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
72 */
73static void clean_IOPL_NT_flags(void)
74{
75 asm volatile (
76 "pushfq\n"
77 "pop %%rax\n"
78 "and $~(0x7000), %%rax\n"
79 "pushq %%rax\n"
80 "popfq\n"
81 ::: "%rax"
82 );
83}
84
85/** Disable alignment check
86 *
87 * Clean AM(18) flag in CR0 register
88 */
89static void clean_AM_flag(void)
90{
91 asm volatile (
92 "mov %%cr0, %%rax\n"
93 "and $~(0x40000), %%rax\n"
94 "mov %%rax, %%cr0\n"
95 ::: "%rax"
96 );
97}
98
99void arch_pre_mm_init(void)
100{
101 /* Enable no-execute pages */
102 set_efer_flag(AMD_NXE_FLAG);
103 /* Enable FPU */
104 cpu_setup_fpu();
105
106 /* Initialize segmentation */
107 pm_init();
108
109 /* Disable I/O on nonprivileged levels
110 * clear the NT (nested-thread) flag
111 */
112 clean_IOPL_NT_flags();
113 /* Disable alignment check */
114 clean_AM_flag();
115
116 if (config.cpu_active == 1) {
117 interrupt_init();
118 bios_init();
119
120 /* PIC */
121 i8259_init();
122 }
123}
124
125
126void arch_post_mm_init(void)
127{
128 if (config.cpu_active == 1) {
129 /* Initialize IRQ routing */
130 irq_init(IRQ_COUNT, IRQ_COUNT);
131
132 /* hard clock */
133 i8254_init();
134
135#ifdef CONFIG_FB
136 if (vesa_present())
137 vesa_init();
138 else
139#endif
140 ega_init(EGA_BASE, EGA_VIDEORAM); /* video */
141
142 /* Enable debugger */
143 debugger_init();
144 /* Merge all memory zones to 1 big zone */
145 zone_merge_all();
146 }
147
148 /* Setup fast SYSCALL/SYSRET */
149 syscall_setup_cpu();
150}
151
152void arch_post_cpu_init()
153{
154#ifdef CONFIG_SMP
155 if (config.cpu_active > 1) {
156 l_apic_init();
157 l_apic_debug();
158 }
159#endif
160}
161
162void arch_pre_smp_init(void)
163{
164 if (config.cpu_active == 1) {
165#ifdef CONFIG_SMP
166 acpi_init();
167#endif /* CONFIG_SMP */
168 }
169}
170
171void arch_post_smp_init(void)
172{
173 devno_t devno = device_assign_devno();
174 /* keyboard controller */
175 (void) i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD);
176
177 /*
178 * This is the necessary evil until the userspace driver is entirely
179 * self-sufficient.
180 */
181 sysinfo_set_item_val("kbd", NULL, true);
182 sysinfo_set_item_val("kbd.devno", NULL, devno);
183 sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
184}
185
186void calibrate_delay_loop(void)
187{
188 i8254_calibrate_delay_loop();
189 if (config.cpu_active == 1) {
190 /*
191 * This has to be done only on UP.
192 * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
193 */
194 i8254_normal_operation();
195 }
196}
197
198/** Set thread-local-storage pointer
199 *
200 * TLS pointer is set in FS register. Unfortunately the 64-bit
201 * part can be set only in CPL0 mode.
202 *
203 * The specs say, that on %fs:0 there is stored contents of %fs register,
204 * we need not to go to CPL0 to read it.
205 */
206unative_t sys_tls_set(unative_t addr)
207{
208 THREAD->arch.tls = addr;
209 write_msr(AMD_MSR_FS, addr);
210 return 0;
211}
212
213/** Acquire console back for kernel
214 *
215 */
216void arch_grab_console(void)
217{
218#ifdef CONFIG_FB
219 vesa_redraw();
220#else
221 ega_redraw();
222#endif
223}
224
225/** Return console to userspace
226 *
227 */
228void arch_release_console(void)
229{
230}
231
232/** Construct function pointer
233 *
234 * @param fptr function pointer structure
235 * @param addr function address
236 * @param caller calling function address
237 *
238 * @return address of the function pointer
239 *
240 */
241void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
242{
243 return addr;
244}
245
246/** @}
247 */
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