source: mainline/kernel/arch/amd64/src/amd64.c@ b272c67a

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since b272c67a was 811770c, checked in by Jakub Jermar <jakub@…>, 9 years ago

Avoid magic numbers and specialized functions to set/get register bits

  • Property mode set to 100644
File size: 6.5 KB
Line 
1/*
2 * Copyright (c) 2005 Ondrej Palkovsky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup amd64
30 * @{
31 */
32/** @file
33 */
34
35#include <arch.h>
36#include <typedefs.h>
37#include <errno.h>
38#include <memstr.h>
39#include <interrupt.h>
40#include <console/console.h>
41#include <syscall/syscall.h>
42#include <sysinfo/sysinfo.h>
43#include <arch/bios/bios.h>
44#include <arch/boot/boot.h>
45#include <arch/drivers/i8254.h>
46#include <arch/drivers/i8259.h>
47#include <arch/syscall.h>
48#include <genarch/acpi/acpi.h>
49#include <genarch/drivers/ega/ega.h>
50#include <genarch/drivers/i8042/i8042.h>
51#include <genarch/drivers/ns16550/ns16550.h>
52#include <genarch/drivers/legacy/ia32/io.h>
53#include <genarch/fb/bfb.h>
54#include <genarch/kbrd/kbrd.h>
55#include <genarch/srln/srln.h>
56#include <genarch/multiboot/multiboot.h>
57#include <genarch/multiboot/multiboot2.h>
58#include <arch/pm.h>
59#include <arch/vreg.h>
60#include <arch/kseg.h>
61
62#ifdef CONFIG_SMP
63#include <arch/smp/apic.h>
64#endif
65
66/** Perform amd64-specific initialization before main_bsp() is called.
67 *
68 * @param signature Multiboot signature.
69 * @param info Multiboot information structure.
70 *
71 */
72void arch_pre_main(uint32_t signature, void *info)
73{
74 /* Parse multiboot information obtained from the bootloader. */
75 multiboot_info_parse(signature, (multiboot_info_t *) info);
76 multiboot2_info_parse(signature, (multiboot2_info_t *) info);
77
78#ifdef CONFIG_SMP
79 /* Copy AP bootstrap routines below 1 MB. */
80 memcpy((void *) AP_BOOT_OFFSET, (void *) BOOT_OFFSET,
81 (size_t) &_hardcoded_unmapped_size);
82#endif
83}
84
85void arch_pre_mm_init(void)
86{
87 /* Enable no-execute pages */
88 write_msr(AMD_MSR_EFER, read_msr(AMD_MSR_EFER) | AMD_NXE);
89 /* Enable FPU */
90 cpu_setup_fpu();
91
92 /* Initialize segmentation */
93 pm_init();
94
95 /* Disable I/O on nonprivileged levels, clear the nested-thread flag */
96 write_rflags(read_rflags() & ~(RFLAGS_IOPL | RFLAGS_NT));
97 /* Disable alignment check */
98 write_cr0(read_cr0() & ~CR0_AM);
99
100 if (config.cpu_active == 1) {
101 interrupt_init();
102 bios_init();
103
104 /* PIC */
105 i8259_init();
106 }
107}
108
109
110void arch_post_mm_init(void)
111{
112 vreg_init();
113 kseg_init();
114
115 if (config.cpu_active == 1) {
116 /* Initialize IRQ routing */
117 irq_init(IRQ_COUNT, IRQ_COUNT);
118
119 /* hard clock */
120 i8254_init();
121
122#if (defined(CONFIG_FB) || defined(CONFIG_EGA))
123 bool bfb = false;
124#endif
125
126#ifdef CONFIG_FB
127 bfb = bfb_init();
128#endif
129
130#ifdef CONFIG_EGA
131 if (!bfb) {
132 outdev_t *egadev = ega_init(EGA_BASE, EGA_VIDEORAM);
133 if (egadev)
134 stdout_wire(egadev);
135 }
136#endif
137
138 /* Merge all memory zones to 1 big zone */
139 zone_merge_all();
140 }
141
142 /* Setup fast SYSCALL/SYSRET */
143 syscall_setup_cpu();
144}
145
146void arch_post_cpu_init(void)
147{
148#ifdef CONFIG_SMP
149 if (config.cpu_active > 1) {
150 l_apic_init();
151 l_apic_debug();
152 }
153#endif
154}
155
156void arch_pre_smp_init(void)
157{
158 if (config.cpu_active == 1) {
159#ifdef CONFIG_SMP
160 acpi_init();
161#endif /* CONFIG_SMP */
162 }
163}
164
165void arch_post_smp_init(void)
166{
167 /* Currently the only supported platform for amd64 is 'pc'. */
168 static const char *platform = "pc";
169
170 sysinfo_set_item_data("platform", NULL, (void *) platform,
171 str_size(platform));
172
173#ifdef CONFIG_PC_KBD
174 /*
175 * Initialize the i8042 controller. Then initialize the keyboard
176 * module and connect it to i8042. Enable keyboard interrupts.
177 */
178 i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
179 if (i8042_instance) {
180 kbrd_instance_t *kbrd_instance = kbrd_init();
181 if (kbrd_instance) {
182 indev_t *sink = stdin_wire();
183 indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
184 i8042_wire(i8042_instance, kbrd);
185 trap_virtual_enable_irqs(1 << IRQ_KBD);
186 trap_virtual_enable_irqs(1 << IRQ_MOUSE);
187 }
188 }
189#endif
190
191#if (defined(CONFIG_NS16550) || defined(CONFIG_NS16550_OUT))
192 /*
193 * Initialize the ns16550 controller.
194 */
195#ifdef CONFIG_NS16550_OUT
196 outdev_t *ns16550_out;
197 outdev_t **ns16550_out_ptr = &ns16550_out;
198#else
199 outdev_t **ns16550_out_ptr = NULL;
200#endif
201 ns16550_instance_t *ns16550_instance
202 = ns16550_init((ns16550_t *) NS16550_BASE, IRQ_NS16550, NULL, NULL,
203 ns16550_out_ptr);
204 if (ns16550_instance) {
205#ifdef CONFIG_NS16550
206 srln_instance_t *srln_instance = srln_init();
207 if (srln_instance) {
208 indev_t *sink = stdin_wire();
209 indev_t *srln = srln_wire(srln_instance, sink);
210 ns16550_wire(ns16550_instance, srln);
211 trap_virtual_enable_irqs(1 << IRQ_NS16550);
212 }
213#endif
214#ifdef CONFIG_NS16550_OUT
215 if (ns16550_out) {
216 stdout_wire(ns16550_out);
217 }
218#endif
219 }
220#endif
221
222 if (irqs_info != NULL)
223 sysinfo_set_item_val(irqs_info, NULL, true);
224}
225
226void calibrate_delay_loop(void)
227{
228 i8254_calibrate_delay_loop();
229 if (config.cpu_active == 1) {
230 /*
231 * This has to be done only on UP.
232 * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
233 */
234 i8254_normal_operation();
235 }
236}
237
238/** Construct function pointer
239 *
240 * @param fptr function pointer structure
241 * @param addr function address
242 * @param caller calling function address
243 *
244 * @return address of the function pointer
245 *
246 */
247void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
248{
249 return addr;
250}
251
252void arch_reboot(void)
253{
254#ifdef CONFIG_PC_KBD
255 i8042_cpu_reset((i8042_t *) I8042_BASE);
256#endif
257}
258
259void irq_initialize_arch(irq_t *irq)
260{
261 (void) irq;
262}
263
264/** @}
265 */
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