source: mainline/kernel/arch/amd64/include/interrupt.h@ 86018c1

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 86018c1 was 304342e, checked in by Jakub Jermar <jakub@…>, 15 years ago

Add amd64 specific support for kernel stack traces.

  • Property mode set to 100644
File size: 3.6 KB
RevLine 
[8a1da55]1/*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[8a1da55]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[06e1e95]29/** @addtogroup amd64interrupt
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[06e1e95]35#ifndef KERN_amd64_INTERRUPT_H_
36#define KERN_amd64_INTERRUPT_H_
[8a1da55]37
38#include <arch/types.h>
39#include <arch/pm.h>
40
41#define IVT_ITEMS IDT_ITEMS
[a000fd71]42#define IVT_FIRST 0
[8a1da55]43
[7e956eb]44#define EXC_COUNT 32
45#define IRQ_COUNT 16
[8a1da55]46
47#define IVT_EXCBASE 0
[8607db8]48#define IVT_IRQBASE (IVT_EXCBASE + EXC_COUNT)
[7e956eb]49#define IVT_FREEBASE (IVT_IRQBASE + IRQ_COUNT)
[8a1da55]50
[8607db8]51#define IRQ_CLK 0
52#define IRQ_KBD 1
53#define IRQ_PIC1 2
[7e956eb]54#define IRQ_PIC_SPUR 7
[8607db8]55#define IRQ_MOUSE 12
[8a1da55]56
57/* this one must have four least significant bits set to ones */
[8607db8]58#define VECTOR_APIC_SPUR (IVT_ITEMS - 1)
[8a1da55]59
[8607db8]60#if (((VECTOR_APIC_SPUR + 1) % 16) || VECTOR_APIC_SPUR >= IVT_ITEMS)
[8a1da55]61#error Wrong definition of VECTOR_APIC_SPUR
62#endif
63
[7e956eb]64#define VECTOR_DEBUG 1
65#define VECTOR_CLK (IVT_IRQBASE + IRQ_CLK)
66#define VECTOR_PIC_SPUR (IVT_IRQBASE + IRQ_PIC_SPUR)
67#define VECTOR_SYSCALL IVT_FREEBASE
[8607db8]68#define VECTOR_TLB_SHOOTDOWN_IPI (IVT_FREEBASE + 1)
[7e956eb]69#define VECTOR_DEBUG_IPI (IVT_FREEBASE + 2)
[8a1da55]70
[25d7709]71/** This is passed to interrupt handlers */
[304342e]72typedef struct istate {
[7f1c620]73 uint64_t rax;
74 uint64_t rcx;
75 uint64_t rdx;
76 uint64_t rsi;
77 uint64_t rdi;
78 uint64_t r8;
79 uint64_t r9;
80 uint64_t r10;
81 uint64_t r11;
[304342e]82 uint64_t rbp;
[7f1c620]83 uint64_t error_word;
84 uint64_t rip;
85 uint64_t cs;
86 uint64_t rflags;
87 uint64_t stack[]; /* Additional data on stack */
[b3f8fb7]88} istate_t;
[25d7709]89
[874621f]90/** Return true if exception happened while in userspace */
91static inline int istate_from_uspace(istate_t *istate)
92{
93 return !(istate->rip & 0x8000000000000000);
94}
95
[7f1c620]96static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
[e3c762cd]97{
98 istate->rip = retaddr;
99}
[7f1c620]100static inline unative_t istate_get_pc(istate_t *istate)
[874621f]101{
102 return istate->rip;
103}
[304342e]104static inline unative_t istate_get_fp(istate_t *istate)
105{
106 return istate->rbp;
107}
[e3c762cd]108
[7f1c620]109extern void (* disable_irqs_function)(uint16_t irqmask);
110extern void (* enable_irqs_function)(uint16_t irqmask);
[8a1da55]111extern void (* eoi_function)(void);
112
[8607db8]113extern void decode_istate(int n, istate_t *istate);
114extern void interrupt_init(void);
[7f1c620]115extern void trap_virtual_enable_irqs(uint16_t irqmask);
116extern void trap_virtual_disable_irqs(uint16_t irqmask);
[dabe6333]117/* AMD64 - specific page handler */
118extern void ident_page_fault(int n, istate_t *istate);
[8a1da55]119
120#endif
[b45c443]121
[06e1e95]122/** @}
[b45c443]123 */
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