source: mainline/kernel/arch/amd64/include/cpu.h@ ddcc8a0

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since ddcc8a0 was dc0b964, checked in by Martin Decky <martin@…>, 15 years ago
  • do not hardwire PRI??? formatting macros in the sources, use autotool to detect the correct values
  • use autotool to detect correct values for integer literal macros (UINT32_C, etc.)
  • start using portable UINT??_C style macros for integer constants
  • Property mode set to 100644
File size: 2.6 KB
Line 
1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup amd64
30 * @{
31 */
32/** @file
33 */
34
35#ifndef KERN_amd64_CPU_H_
36#define KERN_amd64_CPU_H_
37
38#define RFLAGS_CF (1 << 0)
39#define RFLAGS_PF (1 << 2)
40#define RFLAGS_AF (1 << 4)
41#define RFLAGS_ZF (1 << 6)
42#define RFLAGS_SF (1 << 7)
43#define RFLAGS_TF (1 << 8)
44#define RFLAGS_IF (1 << 9)
45#define RFLAGS_DF (1 << 10)
46#define RFLAGS_OF (1 << 11)
47#define RFLAGS_NT (1 << 14)
48#define RFLAGS_RF (1 << 16)
49
50#define EFER_MSR_NUM 0xc0000080
51#define AMD_SCE_FLAG 0
52#define AMD_LME_FLAG 8
53#define AMD_LMA_FLAG 10
54#define AMD_FFXSR_FLAG 14
55#define AMD_NXE_FLAG 11
56
57/* MSR registers */
58#define AMD_MSR_STAR 0xc0000081
59#define AMD_MSR_LSTAR 0xc0000082
60#define AMD_MSR_SFMASK 0xc0000084
61#define AMD_MSR_FS 0xc0000100
62#define AMD_MSR_GS 0xc0000101
63
64#ifndef __ASM__
65
66#include <arch/pm.h>
67
68typedef struct {
69 int vendor;
70 int family;
71 int model;
72 int stepping;
73 tss_t *tss;
74
75 size_t iomapver_copy; /** Copy of TASK's I/O Permission bitmap generation count. */
76} cpu_arch_t;
77
78struct star_msr {
79};
80
81struct lstar_msr {
82};
83
84extern void set_efer_flag(int flag);
85extern uint64_t read_efer_flag(void);
86void cpu_setup_fpu(void);
87
88#endif /* __ASM__ */
89
90#endif
91
92/** @}
93 */
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