| 1 | ## General configuration directives
|
|---|
| 2 |
|
|---|
| 3 | # Architecture
|
|---|
| 4 | @ "ia32" Intel IA-32
|
|---|
| 5 | @ "amd64" AMD64/Intel EM64T
|
|---|
| 6 | @ "ia64" Intel IA-64
|
|---|
| 7 | @ "mips32" MIPS 32-bit
|
|---|
| 8 | @ "ppc32" PowerPC 32-bit
|
|---|
| 9 | @ "sparc64" Sun UltraSPARC
|
|---|
| 10 | ! ARCH (choice)
|
|---|
| 11 |
|
|---|
| 12 | # IA32 Compiler
|
|---|
| 13 | @ "cross" Cross-compiler
|
|---|
| 14 | @ "native" Native
|
|---|
| 15 | ! [ARCH=ia32] IA32_COMPILER (choice)
|
|---|
| 16 | % [ARCH=ia32] SAVEAS IA32_COMPILER COMPILER
|
|---|
| 17 |
|
|---|
| 18 | # AMD64 Compiler
|
|---|
| 19 | @ "cross" Cross-compiler
|
|---|
| 20 | @ "native" Native
|
|---|
| 21 | ! [ARCH=amd64] AMD64_COMPILER (choice)
|
|---|
| 22 | % [ARCH=amd64] SAVEAS AMD64_COMPILER COMPILER
|
|---|
| 23 |
|
|---|
| 24 | # Compiler
|
|---|
| 25 | @ "cross" Cross-compiler
|
|---|
| 26 | @ "native" Native
|
|---|
| 27 | ! [(ARCH!=amd64)&(ARCH!=ia32)] OTHER_COMPILER (choice)
|
|---|
| 28 | % [(ARCH!=amd64)&(ARCH!=ia32)] SAVEAS OTHER_COMPILER COMPILER
|
|---|
| 29 |
|
|---|
| 30 |
|
|---|
| 31 | # CPU type
|
|---|
| 32 | @ "pentium4" Pentium 4
|
|---|
| 33 | @ "pentium3" Pentium 3
|
|---|
| 34 | @ "athlon-xp" Athlon XP
|
|---|
| 35 | @ "athlon-mp" Athlon MP
|
|---|
| 36 | @ "prescott" Prescott
|
|---|
| 37 | ! [ARCH=ia32] IA32_CPU (choice)
|
|---|
| 38 |
|
|---|
| 39 | # MIPS Machine Type
|
|---|
| 40 | @ "msim" MSIM Simulator
|
|---|
| 41 | @ "simics" Virtutech Simics simulator
|
|---|
| 42 | @ "lgxemul" GXEmul Little Endian
|
|---|
| 43 | @ "bgxemul" GXEmul Big Endian
|
|---|
| 44 | @ "indy" SGI Indy
|
|---|
| 45 | ! [ARCH=mips32] MIPS_MACHINE (choice)
|
|---|
| 46 |
|
|---|
| 47 | # Support for SMP
|
|---|
| 48 | ! [ARCH=ia32|ARCH=amd64] CONFIG_SMP (y/n)
|
|---|
| 49 |
|
|---|
| 50 | # Improved support for hyperthreading
|
|---|
| 51 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_HT (y/n)
|
|---|
| 52 |
|
|---|
| 53 | # Simics BIOS AP boot fix
|
|---|
| 54 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n)
|
|---|
| 55 |
|
|---|
| 56 | # Lazy FPU context switching
|
|---|
| 57 | ! [(ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics)|ARCH=amd64|ARCH=ia32] CONFIG_FPU_LAZY (y/n)
|
|---|
| 58 |
|
|---|
| 59 | ## Debugging configuration directives
|
|---|
| 60 |
|
|---|
| 61 | # General debuging and assert checking
|
|---|
| 62 | ! CONFIG_DEBUG (y/n)
|
|---|
| 63 |
|
|---|
| 64 | # Deadlock detection support for spinlocks
|
|---|
| 65 | ! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n)
|
|---|
| 66 |
|
|---|
| 67 | ## Run-time configuration directives
|
|---|
| 68 |
|
|---|
| 69 | # Kernel test type
|
|---|
| 70 | @ "" No test
|
|---|
| 71 | @ "synch/rwlock1" Read write test 1
|
|---|
| 72 | @ "synch/rwlock2" Read write test 2
|
|---|
| 73 | @ "synch/rwlock3" Read write test 3
|
|---|
| 74 | @ "synch/rwlock4" Read write test 4
|
|---|
| 75 | @ "synch/rwlock5" Read write test 5
|
|---|
| 76 | @ "synch/semaphore1" Semaphore test 1
|
|---|
| 77 | @ "synch/semaphore2" Sempahore test 2
|
|---|
| 78 | @ [ARCH=ia32|ARCH=amd64] "fpu/fpu1" Intel fpu test 1
|
|---|
| 79 | @ [ARCH=ia32|ARCH=amd64] "fpu/sse1" Intel Sse test 1
|
|---|
| 80 | @ [ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics] "fpu/mips1" Mips FPU test 1
|
|---|
| 81 | @ "print/print1" Printf test 1
|
|---|
| 82 | @ "thread/thread1" Thread test 1
|
|---|
| 83 | @ "mm/mapping1" Mapping test 1
|
|---|
| 84 | @ "mm/falloc1" Frame Allocation test 1
|
|---|
| 85 | @ "mm/falloc2" Frame Allocation test 2
|
|---|
| 86 | @ "mm/slab1" SLAB test1 - No CPU-cache
|
|---|
| 87 | @ "mm/slab2" SLAB test2 - SMP CPU cache
|
|---|
| 88 | @ [ARCH=mips32] "debug/mips1" Mips breakpoint-debug test
|
|---|
| 89 | ! CONFIG_TEST (choice)
|
|---|
