source: mainline/kernel.config@ 33472fa

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 33472fa was 602c9101, checked in by Martin Decky <martin@…>, 19 years ago

start ppc64 port
the code is currently a wild mixture of 32/64b code, will be fixed

  • Property mode set to 100644
File size: 3.0 KB
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1## General configuration directives
2
3# Architecture
4@ "ia32" Intel IA-32
5@ "amd64" AMD64/Intel EM64T
6@ "ia64" Intel IA-64
7@ "mips32" MIPS 32-bit
8@ "ppc32" PowerPC 32-bit
9@ "ppc64" PowerPC 64-bit
10@ "sparc64" Sun UltraSPARC
11! ARCH (choice)
12
13# IA32 Compiler
14@ "cross" Cross-compiler
15@ "native" Native
16! [ARCH=ia32] IA32_COMPILER (choice)
17% [ARCH=ia32] SAVEAS IA32_COMPILER COMPILER
18
19# AMD64 Compiler
20@ "cross" Cross-compiler
21@ "native" Native
22! [ARCH=amd64] AMD64_COMPILER (choice)
23% [ARCH=amd64] SAVEAS AMD64_COMPILER COMPILER
24
25# Compiler
26@ "cross" Cross-compiler
27@ "native" Native
28! [(ARCH!=amd64)&(ARCH!=ia32)] OTHER_COMPILER (choice)
29% [(ARCH!=amd64)&(ARCH!=ia32)] SAVEAS OTHER_COMPILER COMPILER
30
31
32# CPU type
33@ "pentium4" Pentium 4
34@ "pentium3" Pentium 3
35@ "athlon-xp" Athlon XP
36@ "athlon-mp" Athlon MP
37@ "prescott" Prescott
38! [ARCH=ia32] IA32_CPU (choice)
39
40# MIPS Machine Type
41@ "msim" MSIM Simulator
42@ "simics" Virtutech Simics simulator
43@ "lgxemul" GXEmul Little Endian
44@ "bgxemul" GXEmul Big Endian
45@ "indy" SGI Indy
46! [ARCH=mips32] MIPS_MACHINE (choice)
47
48# Framebuffer support
49! [(ARCH=mips32&MIPS_MACHINE=lgxemul)|(ARCH=mips32&MIPS_MACHINE=bgxemul)] CONFIG_FB (y/n)
50
51# Support for SMP
52! [ARCH=ia32|ARCH=amd64] CONFIG_SMP (y/n)
53
54# Improved support for hyperthreading
55! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_HT (y/n)
56
57# Simics BIOS AP boot fix
58! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n)
59
60# Lazy FPU context switching
61! [(ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64] CONFIG_FPU_LAZY (y/n)
62
63# Power off on halt
64! [ARCH=ppc32] CONFIG_POWEROFF (y/n)
65
66## Debugging configuration directives
67
68# General debuging and assert checking
69! CONFIG_DEBUG (y/n)
70
71# Deadlock detection support for spinlocks
72! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n)
73
74# Watchpoint on rewriting AS with zero
75! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32)] CONFIG_DEBUG_AS_WATCHPOINT (y/n)
76
77# Save all interrupt registers
78! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32)] CONFIG_DEBUG_ALLREGS (y/n)
79
80## Run-time configuration directives
81
82# Kernel test type
83@ "" No test
84@ "atomic/atomic1" Test of atomic operations.
85@ "btree/btree1" B-tree test.
86@ "synch/rwlock1" Read write test 1
87@ "synch/rwlock2" Read write test 2
88@ "synch/rwlock3" Read write test 3
89@ "synch/rwlock4" Read write test 4
90@ "synch/rwlock5" Read write test 5
91@ "synch/semaphore1" Semaphore test 1
92@ "synch/semaphore2" Sempahore test 2
93@ [ARCH=ia32|ARCH=amd64|ARCH=ia64] "fpu/fpu1" Intel fpu test 1
94@ [ARCH=ia32|ARCH=amd64] "fpu/sse1" Intel Sse test 1
95@ [ARCH=mips32&MIPS_MACHINE!=msim&MIPS_MACHINE!=simics] "fpu/mips1" Mips FPU test 1
96@ "print/print1" Printf test 1
97@ "thread/thread1" Thread test 1
98@ "mm/mapping1" Mapping test 1
99@ "mm/falloc1" Frame Allocation test 1
100@ "mm/falloc2" Frame Allocation test 2
101@ "mm/slab1" SLAB test1 - No CPU-cache
102@ "mm/slab2" SLAB test2 - SMP CPU cache
103@ "fault/fault1" Write to NULL (maybe page fault)
104@ [ARCH=ia64] "mm/purge1" Itanium TLB purge test
105@ [ARCH=mips32] "debug/mips1" Mips breakpoint-debug test
106! CONFIG_TEST (choice)
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