source: mainline/include/arch.h@ 49c1f93

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 49c1f93 was 1084a784, checked in by Jakub Jermar <jakub@…>, 20 years ago

mips32 memory management work.
TLB Refill Exception implemented (passed basic testing).
Remove bit g from struct entry_hi.
Add generic find_mapping().
Add asid to vm_t type, define asid_t to hide architecture specific differences.
Implement ASID allocation for mips32, dummy for other architectures.
Add THE→vm (a.k.a. VM).
Add vm_install_arch().
Move pte_t definition to arch/types.h on each architecture.
Fix PTL manipulating functions on mips32 to shift pfn by 12 instead of by 14.
Fix tlb_init_arch() to initialize all entries.

Other.
Remove unnecessary header files from arch.h
Add missing headers here and there.
Remove two unnecessary ld flags from mips32 makefile.
  • Property mode set to 100644
File size: 2.5 KB
Line 
1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __ARCH_H__
30#define __ARCH_H__
31
32#include <arch/types.h>
33#include <typedefs.h>
34
35#include <cpu.h>
36#include <arch/cpu.h>
37#include <arch/asm.h>
38
39#define CPU THE->cpu
40#define THREAD THE->thread
41#define TASK THE->task
42#define VM THE->vm
43#define PREEMPTION_DISABLED THE->preemption_disabled
44
45#ifndef early_mapping
46#define early_mapping(stack, size)
47#endif /* early_mapping */
48
49/*
50 * For each possible kernel stack, structure
51 * of the following type will be placed at
52 * the bottom of the stack.
53 */
54struct the {
55 int preemption_disabled;
56 thread_t *thread; /* current thread */
57 task_t *task; /* current task */
58 cpu_t *cpu; /* executing cpu */
59 vm_t *vm; /* current vm */
60};
61
62#define THE ((the_t *)(get_stack_base()))
63
64extern void the_initialize(the_t *the);
65extern void the_copy(the_t *src, the_t *dst);
66
67extern void arch_pre_mm_init(void);
68extern void arch_post_mm_init(void);
69extern void arch_late_init(void);
70extern void calibrate_delay_loop(void);
71
72extern pri_t cpu_priority_high(void);
73extern pri_t cpu_priority_low(void);
74extern void cpu_priority_restore(pri_t pri);
75extern pri_t cpu_priority_read(void);
76
77#endif
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