source: mainline/generic/include/mm/page.h@ 6d7ffa65

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 6d7ffa65 was 6d7ffa65, checked in by Jakub Jermar <jakub@…>, 20 years ago

Memory management work.
Move generic 4-level page table interface to genarch
and enable architectures to use different virtual memory
mechanisms (e.g. page hash tables).
Start page hash table support.
Switch ia64 and sparc64 to page hash tables.
Other architectures keep on using 4-level page table interface.

  • Property mode set to 100644
File size: 2.7 KB
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1/*
2 * Copyright (C) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef __PAGE_H__
30#define __PAGE_H__
31
32#include <arch/types.h>
33#include <typedefs.h>
34
35#define PAGE_CACHEABLE_SHIFT 0
36#define PAGE_NOT_CACHEABLE_SHIFT PAGE_CACHEABLE_SHIFT
37#define PAGE_PRESENT_SHIFT 1
38#define PAGE_NOT_PRESENT_SHIFT PAGE_PRESENT_SHIFT
39#define PAGE_USER_SHIFT 2
40#define PAGE_KERNEL_SHIFT PAGE_USER_SHIFT
41#define PAGE_READ_SHIFT 3
42#define PAGE_WRITE_SHIFT 4
43#define PAGE_EXEC_SHIFT 5
44
45#define PAGE_NOT_CACHEABLE (0<<PAGE_CACHEABLE_SHIFT)
46#define PAGE_CACHEABLE (1<<PAGE_CACHEABLE_SHIFT)
47
48#define PAGE_PRESENT (0<<PAGE_PRESENT_SHIFT)
49#define PAGE_NOT_PRESENT (1<<PAGE_PRESENT_SHIFT)
50
51#define PAGE_USER (1<<PAGE_USER_SHIFT)
52#define PAGE_KERNEL (0<<PAGE_USER_SHIFT)
53
54#define PAGE_READ (1<<PAGE_READ_SHIFT)
55#define PAGE_WRITE (1<<PAGE_WRITE_SHIFT)
56#define PAGE_EXEC (1<<PAGE_EXEC_SHIFT)
57
58struct page_operations {
59 void (* mapping_insert)(__address page, __address frame, int flags, __address root);
60 pte_t *(* mapping_find)(__address page, __address root);
61};
62typedef struct page_operations page_operations_t;
63
64extern page_operations_t *page_operations;
65
66extern void page_init(void);
67extern void page_mapping_insert(__address page, __address frame, int flags, __address root);
68extern pte_t *page_mapping_find(__address page, __address root);
69extern void map_structure(__address s, size_t size);
70
71#endif
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