source: mainline/genarch/src/acpi/matd.c@ c624b96

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since c624b96 was bb68433, checked in by Ondrej Palkovsky <ondrap@…>, 20 years ago

Changed malloc to include second parameter and documented
recommended usage.
Added zone merging, made ia32 & amd64 to merge found zones.

  • Property mode set to 100644
File size: 6.9 KB
RevLine 
[10a2e22]1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[ed0dd65]29#include <arch/types.h>
[232e3ec7]30#include <typedefs.h>
[e16e036a]31#include <genarch/acpi/acpi.h>
32#include <genarch/acpi/madt.h>
[ed0dd65]33#include <arch/smp/apic.h>
[232e3ec7]34#include <arch/smp/smp.h>
[6b7c36f]35#include <panic.h>
[232e3ec7]36#include <debug.h>
37#include <config.h>
[9c0a9b3]38#include <print.h>
[085d973]39#include <mm/slab.h>
[50a4e25]40#include <memstr.h>
[8491c48]41#include <sort.h>
[10a2e22]42
43struct acpi_madt *acpi_madt = NULL;
[ed0dd65]44
[5f85c91]45#ifdef CONFIG_SMP
[ed0dd65]46
[a83a802]47/** Standard ISA IRQ map; can be overriden by Interrupt Source Override entries of MADT. */
48int isa_irq_map[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
49
[50a4e25]50static void madt_l_apic_entry(struct madt_l_apic *la, __u32 index);
51static void madt_io_apic_entry(struct madt_io_apic *ioa, __u32 index);
[a83a802]52static void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, __u32 index);
[8491c48]53static int madt_cmp(void * a, void * b);
[6b7c36f]54
55struct madt_l_apic *madt_l_apic_entries = NULL;
56struct madt_io_apic *madt_io_apic_entries = NULL;
57
[74b2f5bf]58index_t madt_l_apic_entry_index = 0;
59index_t madt_io_apic_entry_index = 0;
60count_t madt_l_apic_entry_cnt = 0;
61count_t madt_io_apic_entry_cnt = 0;
62count_t cpu_count = 0;
[6b7c36f]63
[50a4e25]64struct madt_apic_header * * madt_entries_index = NULL;
65int madt_entries_index_cnt = 0;
66
[ed0dd65]67char *entry[] = {
68 "L_APIC",
69 "IO_APIC",
70 "INTR_SRC_OVRD",
71 "NMI_SRC",
72 "L_APIC_NMI",
73 "L_APIC_ADDR_OVRD",
74 "IO_SAPIC",
75 "L_SAPIC",
76 "PLATFORM_INTR_SRC"
77};
78
[232e3ec7]79/*
80 * ACPI MADT Implementation of SMP configuration interface.
81 */
82static count_t madt_cpu_count(void);
83static bool madt_cpu_enabled(index_t i);
84static bool madt_cpu_bootstrap(index_t i);
85static __u8 madt_cpu_apic_id(index_t i);
[a83a802]86static int madt_irq_to_pin(int irq);
[232e3ec7]87
88struct smp_config_operations madt_config_operations = {
89 .cpu_count = madt_cpu_count,
90 .cpu_enabled = madt_cpu_enabled,
91 .cpu_bootstrap = madt_cpu_bootstrap,
[a83a802]92 .cpu_apic_id = madt_cpu_apic_id,
93 .irq_to_pin = madt_irq_to_pin
[232e3ec7]94};
95
[a83a802]96count_t madt_cpu_count(void)
[232e3ec7]97{
98 return madt_l_apic_entry_cnt;
99}
100
[a83a802]101bool madt_cpu_enabled(index_t i)
[232e3ec7]102{
103 ASSERT(i < madt_l_apic_entry_cnt);
[50a4e25]104 return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->flags & 0x1;
105
[232e3ec7]106}
107
[a83a802]108bool madt_cpu_bootstrap(index_t i)
[232e3ec7]109{
110 ASSERT(i < madt_l_apic_entry_cnt);
[50a4e25]111 return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id == l_apic_id();
[232e3ec7]112}
113
[a83a802]114__u8 madt_cpu_apic_id(index_t i)
[232e3ec7]115{
116 ASSERT(i < madt_l_apic_entry_cnt);
[50a4e25]117 return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id;
[232e3ec7]118}
119
[a83a802]120int madt_irq_to_pin(int irq)
121{
122 ASSERT(irq < sizeof(isa_irq_map)/sizeof(int));
123 return isa_irq_map[irq];
124}
125
[8491c48]126int madt_cmp(void * a, void * b)
127{
[01e48c1]128 return
129 (((struct madt_apic_header *) a)->type > ((struct madt_apic_header *) b)->type) ?
130 1 :
131 ((((struct madt_apic_header *) a)->type < ((struct madt_apic_header *) b)->type) ? -1 : 0);
[8491c48]132}
133
[ed0dd65]134void acpi_madt_parse(void)
135{
136 struct madt_apic_header *end = (struct madt_apic_header *) (((__u8 *) acpi_madt) + acpi_madt->header.length);
[50a4e25]137 struct madt_apic_header *h;
[2cd073bd]138
139 l_apic = (__u32 *) (__native) acpi_madt->l_apic_address;
[50a4e25]140
141 /* calculate madt entries */
142 for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((__u8 *) h) + h->length)) {
143 madt_entries_index_cnt++;
144 }
145
146 /* create madt apic entries index array */
[bb68433]147 madt_entries_index = (struct madt_apic_header * *) malloc(madt_entries_index_cnt * sizeof(struct madt_apic_header * *), FRAME_ATOMIC);
148 if (!madt_entries_index)
149 panic("Memory allocation error.");
[50a4e25]150
151 __u32 index = 0;
[6b7c36f]152
[50a4e25]153 for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((__u8 *) h) + h->length)) {
154 madt_entries_index[index++] = h;
155 }
[ed0dd65]156
[8491c48]157 /* Quicksort MADT index structure */
158 qsort(madt_entries_index, madt_entries_index_cnt, sizeof(__address), &madt_cmp);
[50a4e25]159
160 /* Parse MADT entries */
161 for (index = 0; index < madt_entries_index_cnt - 1; index++) {
162 h = madt_entries_index[index];
[ed0dd65]163 switch (h->type) {
164 case MADT_L_APIC:
[50a4e25]165 madt_l_apic_entry((struct madt_l_apic *) h, index);
[6b7c36f]166 break;
[ed0dd65]167 case MADT_IO_APIC:
[50a4e25]168 madt_io_apic_entry((struct madt_io_apic *) h, index);
[6b7c36f]169 break;
[ed0dd65]170 case MADT_INTR_SRC_OVRD:
[a83a802]171 madt_intr_src_ovrd_entry((struct madt_intr_src_ovrd *) h, index);
172 break;
[ed0dd65]173 case MADT_NMI_SRC:
174 case MADT_L_APIC_NMI:
175 case MADT_L_APIC_ADDR_OVRD:
176 case MADT_IO_SAPIC:
177 case MADT_L_SAPIC:
178 case MADT_PLATFORM_INTR_SRC:
179 printf("MADT: skipping %s entry (type=%d)\n", entry[h->type], h->type);
180 break;
181
182 default:
183 if (h->type >= MADT_RESERVED_SKIP_BEGIN && h->type <= MADT_RESERVED_SKIP_END) {
184 printf("MADT: skipping reserved entry (type=%d)\n", h->type);
185 }
186 if (h->type >= MADT_RESERVED_OEM_BEGIN) {
187 printf("MADT: skipping OEM entry (type=%d)\n", h->type);
188 }
189 break;
190 }
[50a4e25]191
192
[ed0dd65]193 }
[50a4e25]194
[ed0dd65]195
[74b2f5bf]196 if (cpu_count)
197 config.cpu_count = cpu_count;
[ed0dd65]198}
[6b7c36f]199
200
[50a4e25]201void madt_l_apic_entry(struct madt_l_apic *la, __u32 index)
202{
203 if (!madt_l_apic_entry_cnt++) {
204 madt_l_apic_entry_index = index;
205 }
[6b7c36f]206
207 if (!(la->flags & 0x1)) {
208 /* Processor is unusable, skip it. */
209 return;
210 }
[74b2f5bf]211
212 cpu_count++;
[6b7c36f]213 apic_id_mask |= 1<<la->apic_id;
214}
215
[50a4e25]216void madt_io_apic_entry(struct madt_io_apic *ioa, __u32 index)
[6b7c36f]217{
218 if (!madt_io_apic_entry_cnt++) {
[50a4e25]219 /* remember index of the first io apic entry */
220 madt_io_apic_entry_index = index;
[ab08b42]221 io_apic = (__u32 *) (__native) ioa->io_apic_address;
[50a4e25]222 } else {
[6b7c36f]223 /* currently not supported */
224 return;
225 }
226}
227
[a83a802]228void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, __u32 index)
229{
230 ASSERT(override->source < sizeof(isa_irq_map)/sizeof(int));
[9149135]231 printf("MADT: ignoring %s entry: bus=%d, source=%d, global_int=%d, flags=%W\n",
232 entry[override->header.type], override->bus, override->source,
233 override->global_int, override->flags);
[a83a802]234}
[ed0dd65]235
[5f85c91]236#endif /* CONFIG_SMP */
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