| [10a2e22] | 1 | /*
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| 2 | * Copyright (C) 2005 Jakub Jermar
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| [0f27b4c] | 29 | /**
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| 30 | * @file madt.c
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| 31 | * @brief Multiple APIC Description Table (MADT) parsing.
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| 32 | */
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| 33 |
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| [ed0dd65] | 34 | #include <arch/types.h>
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| [232e3ec7] | 35 | #include <typedefs.h>
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| [e16e036a] | 36 | #include <genarch/acpi/acpi.h>
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| 37 | #include <genarch/acpi/madt.h>
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| [ed0dd65] | 38 | #include <arch/smp/apic.h>
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| [232e3ec7] | 39 | #include <arch/smp/smp.h>
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| [6b7c36f] | 40 | #include <panic.h>
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| [232e3ec7] | 41 | #include <debug.h>
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| 42 | #include <config.h>
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| [9c0a9b3] | 43 | #include <print.h>
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| [085d973] | 44 | #include <mm/slab.h>
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| [50a4e25] | 45 | #include <memstr.h>
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| [8491c48] | 46 | #include <sort.h>
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| [10a2e22] | 47 |
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| 48 | struct acpi_madt *acpi_madt = NULL;
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| [ed0dd65] | 49 |
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| [5f85c91] | 50 | #ifdef CONFIG_SMP
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| [ed0dd65] | 51 |
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| [a83a802] | 52 | /** Standard ISA IRQ map; can be overriden by Interrupt Source Override entries of MADT. */
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| 53 | int isa_irq_map[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
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| 54 |
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| [50a4e25] | 55 | static void madt_l_apic_entry(struct madt_l_apic *la, __u32 index);
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| 56 | static void madt_io_apic_entry(struct madt_io_apic *ioa, __u32 index);
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| [a83a802] | 57 | static void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, __u32 index);
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| [8491c48] | 58 | static int madt_cmp(void * a, void * b);
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| [6b7c36f] | 59 |
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| 60 | struct madt_l_apic *madt_l_apic_entries = NULL;
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| 61 | struct madt_io_apic *madt_io_apic_entries = NULL;
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| 62 |
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| [74b2f5bf] | 63 | index_t madt_l_apic_entry_index = 0;
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| 64 | index_t madt_io_apic_entry_index = 0;
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| 65 | count_t madt_l_apic_entry_cnt = 0;
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| 66 | count_t madt_io_apic_entry_cnt = 0;
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| 67 | count_t cpu_count = 0;
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| [6b7c36f] | 68 |
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| [50a4e25] | 69 | struct madt_apic_header * * madt_entries_index = NULL;
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| 70 | int madt_entries_index_cnt = 0;
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| 71 |
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| [ed0dd65] | 72 | char *entry[] = {
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| 73 | "L_APIC",
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| 74 | "IO_APIC",
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| 75 | "INTR_SRC_OVRD",
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| 76 | "NMI_SRC",
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| 77 | "L_APIC_NMI",
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| 78 | "L_APIC_ADDR_OVRD",
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| 79 | "IO_SAPIC",
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| 80 | "L_SAPIC",
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| 81 | "PLATFORM_INTR_SRC"
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| 82 | };
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| 83 |
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| [232e3ec7] | 84 | /*
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| 85 | * ACPI MADT Implementation of SMP configuration interface.
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| 86 | */
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| 87 | static count_t madt_cpu_count(void);
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| 88 | static bool madt_cpu_enabled(index_t i);
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| 89 | static bool madt_cpu_bootstrap(index_t i);
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| 90 | static __u8 madt_cpu_apic_id(index_t i);
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| [a83a802] | 91 | static int madt_irq_to_pin(int irq);
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| [232e3ec7] | 92 |
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| 93 | struct smp_config_operations madt_config_operations = {
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| 94 | .cpu_count = madt_cpu_count,
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| 95 | .cpu_enabled = madt_cpu_enabled,
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| 96 | .cpu_bootstrap = madt_cpu_bootstrap,
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| [a83a802] | 97 | .cpu_apic_id = madt_cpu_apic_id,
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| 98 | .irq_to_pin = madt_irq_to_pin
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| [232e3ec7] | 99 | };
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| 100 |
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| [a83a802] | 101 | count_t madt_cpu_count(void)
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| [232e3ec7] | 102 | {
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| 103 | return madt_l_apic_entry_cnt;
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| 104 | }
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| 105 |
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| [a83a802] | 106 | bool madt_cpu_enabled(index_t i)
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| [232e3ec7] | 107 | {
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| 108 | ASSERT(i < madt_l_apic_entry_cnt);
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| [50a4e25] | 109 | return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->flags & 0x1;
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| 110 |
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| [232e3ec7] | 111 | }
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| 112 |
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| [a83a802] | 113 | bool madt_cpu_bootstrap(index_t i)
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| [232e3ec7] | 114 | {
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| 115 | ASSERT(i < madt_l_apic_entry_cnt);
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| [50a4e25] | 116 | return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id == l_apic_id();
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| [232e3ec7] | 117 | }
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| 118 |
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| [a83a802] | 119 | __u8 madt_cpu_apic_id(index_t i)
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| [232e3ec7] | 120 | {
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| 121 | ASSERT(i < madt_l_apic_entry_cnt);
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| [50a4e25] | 122 | return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id;
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| [232e3ec7] | 123 | }
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| 124 |
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| [a83a802] | 125 | int madt_irq_to_pin(int irq)
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| 126 | {
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| 127 | ASSERT(irq < sizeof(isa_irq_map)/sizeof(int));
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| 128 | return isa_irq_map[irq];
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| 129 | }
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| 130 |
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| [8491c48] | 131 | int madt_cmp(void * a, void * b)
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| 132 | {
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| [01e48c1] | 133 | return
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| 134 | (((struct madt_apic_header *) a)->type > ((struct madt_apic_header *) b)->type) ?
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| 135 | 1 :
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| 136 | ((((struct madt_apic_header *) a)->type < ((struct madt_apic_header *) b)->type) ? -1 : 0);
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| [8491c48] | 137 | }
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| 138 |
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| [ed0dd65] | 139 | void acpi_madt_parse(void)
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| 140 | {
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| 141 | struct madt_apic_header *end = (struct madt_apic_header *) (((__u8 *) acpi_madt) + acpi_madt->header.length);
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| [50a4e25] | 142 | struct madt_apic_header *h;
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| [2cd073bd] | 143 |
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| 144 | l_apic = (__u32 *) (__native) acpi_madt->l_apic_address;
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| [50a4e25] | 145 |
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| 146 | /* calculate madt entries */
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| 147 | for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((__u8 *) h) + h->length)) {
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| 148 | madt_entries_index_cnt++;
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| 149 | }
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| 150 |
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| 151 | /* create madt apic entries index array */
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| [bb68433] | 152 | madt_entries_index = (struct madt_apic_header * *) malloc(madt_entries_index_cnt * sizeof(struct madt_apic_header * *), FRAME_ATOMIC);
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| 153 | if (!madt_entries_index)
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| 154 | panic("Memory allocation error.");
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| [50a4e25] | 155 |
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| 156 | __u32 index = 0;
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| [6b7c36f] | 157 |
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| [50a4e25] | 158 | for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((__u8 *) h) + h->length)) {
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| 159 | madt_entries_index[index++] = h;
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| 160 | }
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| [ed0dd65] | 161 |
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| [8491c48] | 162 | /* Quicksort MADT index structure */
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| 163 | qsort(madt_entries_index, madt_entries_index_cnt, sizeof(__address), &madt_cmp);
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| [50a4e25] | 164 |
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| 165 | /* Parse MADT entries */
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| 166 | for (index = 0; index < madt_entries_index_cnt - 1; index++) {
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| 167 | h = madt_entries_index[index];
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| [ed0dd65] | 168 | switch (h->type) {
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| 169 | case MADT_L_APIC:
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| [50a4e25] | 170 | madt_l_apic_entry((struct madt_l_apic *) h, index);
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| [6b7c36f] | 171 | break;
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| [ed0dd65] | 172 | case MADT_IO_APIC:
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| [50a4e25] | 173 | madt_io_apic_entry((struct madt_io_apic *) h, index);
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| [6b7c36f] | 174 | break;
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| [ed0dd65] | 175 | case MADT_INTR_SRC_OVRD:
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| [a83a802] | 176 | madt_intr_src_ovrd_entry((struct madt_intr_src_ovrd *) h, index);
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| 177 | break;
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| [ed0dd65] | 178 | case MADT_NMI_SRC:
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| 179 | case MADT_L_APIC_NMI:
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| 180 | case MADT_L_APIC_ADDR_OVRD:
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| 181 | case MADT_IO_SAPIC:
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| 182 | case MADT_L_SAPIC:
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| 183 | case MADT_PLATFORM_INTR_SRC:
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| [280a27e] | 184 | printf("MADT: skipping %s entry (type=%zd)\n", entry[h->type], h->type);
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| [ed0dd65] | 185 | break;
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| 186 |
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| 187 | default:
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| 188 | if (h->type >= MADT_RESERVED_SKIP_BEGIN && h->type <= MADT_RESERVED_SKIP_END) {
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| [280a27e] | 189 | printf("MADT: skipping reserved entry (type=%zd)\n", h->type);
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| [ed0dd65] | 190 | }
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| 191 | if (h->type >= MADT_RESERVED_OEM_BEGIN) {
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| [280a27e] | 192 | printf("MADT: skipping OEM entry (type=%zd)\n", h->type);
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| [ed0dd65] | 193 | }
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| 194 | break;
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| 195 | }
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| [50a4e25] | 196 |
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| 197 |
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| [ed0dd65] | 198 | }
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| [50a4e25] | 199 |
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| [ed0dd65] | 200 |
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| [74b2f5bf] | 201 | if (cpu_count)
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| 202 | config.cpu_count = cpu_count;
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| [ed0dd65] | 203 | }
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| [6b7c36f] | 204 |
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| 205 |
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| [50a4e25] | 206 | void madt_l_apic_entry(struct madt_l_apic *la, __u32 index)
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| 207 | {
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| 208 | if (!madt_l_apic_entry_cnt++) {
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| 209 | madt_l_apic_entry_index = index;
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| 210 | }
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| [6b7c36f] | 211 |
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| 212 | if (!(la->flags & 0x1)) {
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| 213 | /* Processor is unusable, skip it. */
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| 214 | return;
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| 215 | }
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| [74b2f5bf] | 216 |
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| 217 | cpu_count++;
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| [6b7c36f] | 218 | apic_id_mask |= 1<<la->apic_id;
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| 219 | }
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| 220 |
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| [50a4e25] | 221 | void madt_io_apic_entry(struct madt_io_apic *ioa, __u32 index)
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| [6b7c36f] | 222 | {
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| 223 | if (!madt_io_apic_entry_cnt++) {
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| [50a4e25] | 224 | /* remember index of the first io apic entry */
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| 225 | madt_io_apic_entry_index = index;
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| [ab08b42] | 226 | io_apic = (__u32 *) (__native) ioa->io_apic_address;
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| [50a4e25] | 227 | } else {
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| [6b7c36f] | 228 | /* currently not supported */
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| 229 | return;
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| 230 | }
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| 231 | }
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| 232 |
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| [a83a802] | 233 | void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, __u32 index)
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| 234 | {
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| 235 | ASSERT(override->source < sizeof(isa_irq_map)/sizeof(int));
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| [280a27e] | 236 | printf("MADT: ignoring %s entry: bus=%zd, source=%zd, global_int=%zd, flags=%#hX\n",
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| [9149135] | 237 | entry[override->header.type], override->bus, override->source,
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| 238 | override->global_int, override->flags);
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| [a83a802] | 239 | }
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| [ed0dd65] | 240 |
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| [5f85c91] | 241 | #endif /* CONFIG_SMP */
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