lfn
serial
ticket/834-toolchain-update
topic/msim-upgrade
topic/simplify-dev-export
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Last change
on this file since 66def8d was 992bbb97, checked in by Jakub Jermar <jakub@…>, 20 years ago |
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Start with generic 4-level page table interface.
Usual cleanup.
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-
Property mode
set to
100644
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File size:
2.1 KB
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| 1 | Memory management
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| 2 | =================
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| 3 |
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| 4 | SPARTAN kernel deploys generic interface for 4-level page tables,
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| 5 | no matter what the real underlying hardware architecture is.
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| 6 |
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| 7 |
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| 8 | VADDR
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| 9 | +-----------------------------------------------------------------------------+
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| 10 | | PTL0_INDEX | PTL1_INDEX | PTL2_INDEX | PTL3_INDEX | OFFSET |
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| 11 | +-----------------------------------------------------------------------------+
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| 12 |
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| 13 |
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| 14 | PTL0 PTL1 PTL2 PTL3
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| 15 | +--------+ +--------+ +--------+ +--------+
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| 16 | | | | | | PTL3 | -----\ | |
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| 17 | | | | | +--------+ | | |
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| 18 | | | +--------+ | | | | |
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| 19 | | | | PTL2 | -----\ | | | | |
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| 20 | | | +--------+ | | | | | |
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| 21 | | | | | | | | | +--------+
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| 22 | +--------+ | | | | | | | FRAME |
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| 23 | | PTL1 | -----\ | | | | | | +--------+
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| 24 | +--------+ | | | | | | | | |
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| 25 | | | | | | | | | | | |
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| 26 | | | | | | | | | | | |
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| 27 | +--------+ \----> +--------+ \----> +--------+ \----> +--------+
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| 28 | ^
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| 29 | |
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| 30 | |
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| 31 | +--------+
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| 32 | | PTL0 |
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| 33 | +--------+
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| 34 |
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| 35 |
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| 36 | PTL0 Page Table Level 0 (Page Directory)
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| 37 | PTL1 Page Table Level 1
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| 38 | PTL2 Page Table Level 2
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| 39 | PTL3 Page Table Level 3
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| 40 |
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| 41 | PTL0_INDEX Index into PTL0
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| 42 | PTL1_INDEX Index into PTL1
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| 43 | PTL2_INDEX Index into PTL2
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| 44 | PTL3_INDEX Index into PTL3
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| 45 |
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| 46 | VADDR Virtual address for which mapping is looked up
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| 47 | FRAME Physical address of memory frame to which VADDR is mapped
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| 48 |
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| 49 |
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| 50 | On architectures whose hardware has fewer levels, PTL2 and, if need be, PTL1 are
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| 51 | left out. TLB-only architectures are to define custom format for software page
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| 52 | tables.
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