lfn
serial
ticket/834-toolchain-update
topic/msim-upgrade
topic/simplify-dev-export
|
Last change
on this file since f7a13b9 was 60875800, checked in by Jakub Vana <jakub.vana@…>, 21 years ago |
|
Coding style fix
|
-
Property mode
set to
100644
|
|
File size:
1.3 KB
|
| Line | |
|---|
| 1 | + implement true memory management
|
|---|
| 2 | + [ia32] use int 0x15 ax=0xe820 to get memory map and memory size
|
|---|
| 3 | + [mips] use some heuristics to get memory map and memory size
|
|---|
| 4 | + reimplement heap so that it can allocate/deallocate itself frames as necessary
|
|---|
| 5 | + provide native four-level portable page table interface
|
|---|
| 6 | + every architecture uses its native page table format
|
|---|
| 7 | + kernel provides unified four-level page table interface for all architectures
|
|---|
| 8 | + track usage of frames containing middle-level page tables (frame leak)
|
|---|
| 9 |
|
|---|
| 10 | + get user mode support for all architectures
|
|---|
| 11 |
|
|---|
| 12 | + save/restore floating point context on context switch
|
|---|
| 13 | + [ia32] lazy context switch using TS flag [DONE]
|
|---|
| 14 | + [ia32] MMX,SSE1-.. initialization
|
|---|
| 15 | + [ia32] review privilege separation [DONE]
|
|---|
| 16 | + zero IOPL in EFLAGS [DONE]
|
|---|
| 17 | + before IRET (from SYSCALL), zero NT in EFLAGS [DONE]
|
|---|
| 18 | + [ia32] review the cache controling bits in CR0 register
|
|---|
| 19 | + [ia32] zero the alignment exception bit in EFLAGS [DONE]
|
|---|
| 20 | - Task changed to clean AM in CR0 so the alignment check is disabled globaly
|
|---|
| 21 | + make emulated architectures also work on real hardware
|
|---|
| 22 | + bring in support for other architectures (e.g. PowerPC)
|
|---|
| 23 |
|
|---|
| 24 |
|
|---|
Note:
See
TracBrowser
for help on using the repository browser.
