source: mainline/boot/arch/sparc64/src/ofw.c@ a52e2f4

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since a52e2f4 was 4872160, checked in by Martin Decky <martin@…>, 15 years ago

new boot infrastructure

  • more code and metadata unification
  • import of up-to-date implementations from the kernel
  • the boot loaders should behave more similarly on all platforms
  • support for deflate compressed (LZ77) boot components
    • this again allows feasible boot images to be created on mips32
  • IA64 is still not booting
    • the broken forked GNU EFI library has been removed, a replacement of the functionality is on its way
  • Property mode set to 100644
File size: 5.0 KB
RevLine 
[3c1dec0]1/*
[df4ed85]2 * Copyright (c) 2005 Martin Decky
3 * Copyright (c) 2006 Jakub Jermar
[3c1dec0]4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
[63cda71]29
30/**
31 * @file
[e731b0d]32 * @brief Architecture dependent parts of OpenFirmware interface.
[63cda71]33 */
34
[4872160]35#include <arch/arch.h>
36#include <arch/ofw.h>
37#include <genarch/ofw.h>
38#include <typedefs.h>
[ce8725be]39#include <printf.h>
[4872160]40#include <halt.h>
41#include <putchar.h>
42#include <str.h>
[3c1dec0]43
[4872160]44void putchar(const wchar_t ch)
[2e672fd]45{
[4872160]46 if (ch == '\n')
47 ofw_putchar('\r');
[63cda71]48
[4872160]49 if (ascii_check(ch))
50 ofw_putchar(ch);
51 else
52 ofw_putchar(U_SPECIAL);
[c34f98f]53}
[b7b5f83]54
[4872160]55/** Start all CPUs represented by following siblings of the given node.
56 *
57 * Except for the current CPU.
[965dc18]58 *
[e731b0d]59 * @param child The first child of the OFW tree node whose children
60 * represent CPUs to be woken up.
61 * @param current_mid MID of the current CPU, the current CPU will
62 * (of course) not be woken up.
63 * @param physmem_start Starting address of the physical memory.
64 *
65 * @return Number of CPUs which have the same parent node as
66 * "child".
67 *
[965dc18]68 */
[4872160]69static size_t wake_cpus_in_node(phandle child, uint64_t current_mid,
[e731b0d]70 uintptr_t physmem_start)
[9a5b556]71{
[4872160]72 size_t cpus;
[45b26dad]73
[4872160]74 for (cpus = 0; (child != 0) && (child != (phandle) -1);
[965dc18]75 child = ofw_get_peer_node(child), cpus++) {
[ed5ad30]76 char type_name[OFW_TREE_PROPERTY_MAX_VALUELEN];
[e731b0d]77
[965dc18]78 if (ofw_get_property(child, "device_type", type_name,
[ed5ad30]79 OFW_TREE_PROPERTY_MAX_VALUELEN) > 0) {
80 type_name[OFW_TREE_PROPERTY_MAX_VALUELEN - 1] = 0;
[4872160]81
82 if (str_cmp(type_name, "cpu") == 0) {
[45b26dad]83 uint32_t mid;
[9a5b556]84
[965dc18]85 /*
86 * "upa-portid" for US, "portid" for US-III,
87 * "cpuid" for US-IV
88 */
[e731b0d]89 if ((ofw_get_property(child, "upa-portid", &mid, sizeof(mid)) <= 0)
90 && (ofw_get_property(child, "portid", &mid, sizeof(mid)) <= 0)
91 && (ofw_get_property(child, "cpuid", &mid, sizeof(mid)) <= 0))
[9a5b556]92 continue;
[e731b0d]93
[45b26dad]94 if (current_mid != mid) {
95 /*
96 * Start secondary processor.
97 */
[1eb154f]98 (void) ofw_call("SUNW,start-cpu", 3, 1,
[4872160]99 NULL, child, KERNEL_ADDRESS,
[e731b0d]100 physmem_start | AP_PROCESSOR);
[45b26dad]101 }
[9a5b556]102 }
103 }
[45b26dad]104 }
[e731b0d]105
[a9ac978]106 return cpus;
[9a5b556]107}
[f2ea5d8]108
[4872160]109/** Find out the current CPU's MID and wake up all AP processors.
110 *
[965dc18]111 */
[4872160]112void ofw_cpu(uint16_t mid_mask, uintptr_t physmem_start)
[965dc18]113{
[e731b0d]114 /* Get the current CPU MID */
[965dc18]115 uint64_t current_mid;
116
[e731b0d]117 asm volatile (
[4872160]118 "ldxa [%[zero]] %[asi], %[current_mid]\n"
119 : [current_mid] "=r" (current_mid)
120 : [zero] "r" (0),
121 [asi] "i" (ASI_ICBUS_CONFIG)
[e731b0d]122 );
123
[965dc18]124 current_mid >>= ICBUS_CONFIG_MID_SHIFT;
125 current_mid &= mid_mask;
126
[e731b0d]127 /* Wake up the CPUs */
128
129 phandle cpus_parent = ofw_find_device("/ssm@0,0");
[4872160]130 if ((cpus_parent == 0) || (cpus_parent == (phandle) -1))
[965dc18]131 cpus_parent = ofw_find_device("/");
[e731b0d]132
133 phandle node = ofw_get_child_node(cpus_parent);
[4872160]134 size_t cpus = wake_cpus_in_node(node, current_mid, physmem_start);
135
136 while ((node != 0) && (node != (phandle) -1)) {
[ed5ad30]137 char name[OFW_TREE_PROPERTY_MAX_VALUELEN];
[e731b0d]138
[965dc18]139 if (ofw_get_property(node, "name", name,
[ed5ad30]140 OFW_TREE_PROPERTY_MAX_VALUELEN) > 0) {
141 name[OFW_TREE_PROPERTY_MAX_VALUELEN - 1] = 0;
[4872160]142
143 if (str_cmp(name, "cmp") == 0) {
[e731b0d]144 phandle subnode = ofw_get_child_node(node);
[965dc18]145 cpus += wake_cpus_in_node(subnode,
[4872160]146 current_mid, physmem_start);
[965dc18]147 }
148 }
[4872160]149
[965dc18]150 node = ofw_get_peer_node(node);
151 }
152
[4872160]153 if (cpus == 0)
154 printf("Warning: Unable to get CPU properties.\n");
[965dc18]155}
156
[f2ea5d8]157/** Get physical memory starting address.
158 *
[4872160]159 * @return Physical memory starting address.
[f2ea5d8]160 *
161 */
[4872160]162uintptr_t ofw_get_physmem_start(void)
[f2ea5d8]163{
164 uint32_t memreg[4];
[4872160]165 if ((ofw_ret_t) ofw_get_property(ofw_memory, "reg", &memreg,
166 sizeof(memreg)) <= 0) {
167 printf("Error: Unable to get physical memory starting address, halting.\n");
168 halt();
169 }
[e731b0d]170
[4872160]171 return ((((uintptr_t) memreg[0]) << 32) | memreg[1]);
[f2ea5d8]172}
Note: See TracBrowser for help on using the repository browser.