source: mainline/boot/arch/sparc64/loader/ofwarch.c@ 86018c1

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 86018c1 was ed5ad30, checked in by Martin Decky <martin@…>, 16 years ago

reflect the change of the names of the macro

  • Property mode set to 100644
File size: 4.9 KB
RevLine 
[3c1dec0]1/*
[df4ed85]2 * Copyright (c) 2005 Martin Decky
3 * Copyright (c) 2006 Jakub Jermar
[3c1dec0]4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
[63cda71]29
30/**
31 * @file
[e731b0d]32 * @brief Architecture dependent parts of OpenFirmware interface.
[63cda71]33 */
34
[fa024ce]35#include <ofwarch.h>
[ce8725be]36#include <ofw.h>
37#include <printf.h>
[9a5b556]38#include <string.h>
[a9ac978]39#include <register.h>
[9a5b556]40#include "main.h"
[f2ea5d8]41#include "asm.h"
[3c1dec0]42
[63cda71]43void write(const char *str, const int len)
[2e672fd]44{
[63cda71]45 int i;
46
47 for (i = 0; i < len; i++) {
48 if (str[i] == '\n')
49 ofw_write("\r", 1);
50 ofw_write(&str[i], 1);
51 }
[2e672fd]52}
53
[63cda71]54int ofw_translate_failed(ofw_arg_t flag)
[c34f98f]55{
[63cda71]56 return flag != -1;
[c34f98f]57}
[b7b5f83]58
[965dc18]59/**
60 * Starts all CPUs represented by following siblings of the given node,
61 * except for the current CPU.
62 *
[e731b0d]63 * @param child The first child of the OFW tree node whose children
64 * represent CPUs to be woken up.
65 * @param current_mid MID of the current CPU, the current CPU will
66 * (of course) not be woken up.
67 * @param physmem_start Starting address of the physical memory.
68 *
69 * @return Number of CPUs which have the same parent node as
70 * "child".
71 *
[965dc18]72 */
[e731b0d]73static int wake_cpus_in_node(phandle child, uint64_t current_mid,
74 uintptr_t physmem_start)
[9a5b556]75{
[a9ac978]76 int cpus;
[45b26dad]77
[e731b0d]78 for (cpus = 0; (child != 0) && (child != -1);
[965dc18]79 child = ofw_get_peer_node(child), cpus++) {
[ed5ad30]80 char type_name[OFW_TREE_PROPERTY_MAX_VALUELEN];
[e731b0d]81
[965dc18]82 if (ofw_get_property(child, "device_type", type_name,
[ed5ad30]83 OFW_TREE_PROPERTY_MAX_VALUELEN) > 0) {
84 type_name[OFW_TREE_PROPERTY_MAX_VALUELEN - 1] = 0;
[28ecadb]85 if (strcmp(type_name, "cpu") == 0) {
[45b26dad]86 uint32_t mid;
[9a5b556]87
[965dc18]88 /*
89 * "upa-portid" for US, "portid" for US-III,
90 * "cpuid" for US-IV
91 */
[e731b0d]92 if ((ofw_get_property(child, "upa-portid", &mid, sizeof(mid)) <= 0)
93 && (ofw_get_property(child, "portid", &mid, sizeof(mid)) <= 0)
94 && (ofw_get_property(child, "cpuid", &mid, sizeof(mid)) <= 0))
[9a5b556]95 continue;
[e731b0d]96
[45b26dad]97 if (current_mid != mid) {
98 /*
99 * Start secondary processor.
100 */
[1eb154f]101 (void) ofw_call("SUNW,start-cpu", 3, 1,
[965dc18]102 NULL, child, KERNEL_VIRTUAL_ADDRESS,
[e731b0d]103 physmem_start | AP_PROCESSOR);
[45b26dad]104 }
[9a5b556]105 }
106 }
[45b26dad]107 }
[e731b0d]108
[a9ac978]109 return cpus;
[9a5b556]110}
[f2ea5d8]111
[965dc18]112/**
113 * Finds out the current CPU's MID and wakes up all AP processors.
114 */
[e731b0d]115int ofw_cpu(uint16_t mid_mask, uintptr_t physmem_start)
[965dc18]116{
[e731b0d]117 /* Get the current CPU MID */
[965dc18]118 uint64_t current_mid;
119
[e731b0d]120 asm volatile (
121 "ldxa [%1] %2, %0\n"
122 : "=r" (current_mid)
123 : "r" (0), "i" (ASI_ICBUS_CONFIG)
124 );
125
[965dc18]126 current_mid >>= ICBUS_CONFIG_MID_SHIFT;
127 current_mid &= mid_mask;
128
[e731b0d]129 /* Wake up the CPUs */
130
131 phandle cpus_parent = ofw_find_device("/ssm@0,0");
132 if ((cpus_parent == 0) || (cpus_parent == -1))
[965dc18]133 cpus_parent = ofw_find_device("/");
[e731b0d]134
135 phandle node = ofw_get_child_node(cpus_parent);
136 int cpus = wake_cpus_in_node(node, current_mid, physmem_start);
137 while ((node != 0) && (node != -1)) {
[ed5ad30]138 char name[OFW_TREE_PROPERTY_MAX_VALUELEN];
[e731b0d]139
[965dc18]140 if (ofw_get_property(node, "name", name,
[ed5ad30]141 OFW_TREE_PROPERTY_MAX_VALUELEN) > 0) {
142 name[OFW_TREE_PROPERTY_MAX_VALUELEN - 1] = 0;
[965dc18]143 if (strcmp(name, "cmp") == 0) {
[e731b0d]144 phandle subnode = ofw_get_child_node(node);
[965dc18]145 cpus += wake_cpus_in_node(subnode,
[e731b0d]146 current_mid, physmem_start);
[965dc18]147 }
148 }
149 node = ofw_get_peer_node(node);
150 }
151
152 return cpus;
153}
154
[f2ea5d8]155/** Get physical memory starting address.
156 *
[e731b0d]157 * @param start Pointer to variable where the physical memory starting
158 * address will be stored.
159 *
160 * @return Non-zero on succes, zero on failure.
[f2ea5d8]161 *
162 */
163int ofw_get_physmem_start(uintptr_t *start)
164{
165 uint32_t memreg[4];
166 if (ofw_get_property(ofw_memory, "reg", &memreg, sizeof(memreg)) <= 0)
167 return 0;
[e731b0d]168
[f2ea5d8]169 *start = (((uint64_t) memreg[0]) << 32) | memreg[1];
170 return 1;
171}
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