source: mainline/boot/arch/riscv64/src/ucb.c@ 7a99507

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 7a99507 was 8b6aa39, checked in by Martin Decky <martin@…>, 9 years ago

dummy/fake support for RISC-V (RV64G)
it compiles and the boot loader extracts the system components, but otherwise the source serves only as a placeholder for future working implementation

  • Property mode set to 100644
File size: 1.8 KB
Line 
1/*
2 * Copyright (c) 2016 Martin Decky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <arch/ucb.h>
30#include <arch/arch.h>
31#include <macros.h>
32
33void htif_cmd(uint8_t device, uint8_t cmd, uint64_t payload)
34{
35 uint64_t val = (((uint64_t) device) << 56) |
36 (((uint64_t) cmd) << 48) |
37 (payload & UINT64_C(0xffffffffffff));
38 uint64_t retval;
39
40 do {
41 asm volatile (
42 "csrrw %[retval], " STRING(CSR_MTOHOST) ", %[val]\n"
43 : [retval] "=r" (retval)
44 : [val] "r" (val)
45 );
46 } while (retval != 0);
47}
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