source: mainline/boot/arch/ppc32/loader/asm.S@ 656437a0

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 656437a0 was e731b0d, checked in by Martin Decky <martin@…>, 16 years ago

make ppc32 OFW usage on par with sparc64, make appropriate modifications elsewhere

  • introduce ofw_tree_walk_by_device_type() to gather all OFW devices of a given type
  • ppc32 uses canonized OFW tree, mac-io and display devices are detected in kernel (not by the boot loader) by means of device type
  • various busses (PCI, EBUS, etc.) stay sparc64 specific for now
  • boot memcpy() is defined in a common way
  • BALLOC_MAX_SIZE is platform-dependent
  • ppc32 and sparc64 boot loaders cleanup (removal of obsolete stuff, data is not passed by global variables if not necessary, etc.)
  • balloc and OFW tree canonizer have now a provision to support different mapping of the data during boot time and kernel run-time
  • OFW tree canonizer uses balloc_rebase() to store pointers suitable for access during kernel run-time (with potentially different memory mapping than during boot time)
  • Property mode set to 100644
File size: 6.3 KB
Line 
1#
2# Copyright (c) 2006 Martin Decky
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include "asm.h"
30#include "regname.h"
31#include "ofwarch.h"
32
33.macro SMC_COHERENCY addr
34 dcbst 0, \addr
35 sync
36 icbi 0, \addr
37 sync
38 isync
39.endm
40
41.macro FLUSH_DCACHE addr
42 dcbst 0, \addr
43 sync
44 isync
45.endm
46
47.macro TLB_FLUSH reg
48 li \reg, 0
49 sync
50
51 .rept 64
52 tlbie \reg
53 addi \reg, \reg, 0x1000
54 .endr
55
56 eieio
57 tlbsync
58 sync
59.endm
60
61.text
62
63.global halt
64.global memcpy
65.global jump_to_kernel
66.global balloc_base
67
68halt:
69 b halt
70
71memcpy:
72 srwi. r7, r5, 3
73 addi r6, r3, -4
74 addi r4, r4, -4
75 beq 2f
76
77 andi. r0, r6, 3
78 mtctr r7
79 bne 5f
80
81 1:
82 lwz r7, 4(r4)
83 lwzu r8, 8(r4)
84 stw r7, 4(r6)
85 stwu r8, 8(r6)
86 bdnz 1b
87
88 andi. r5, r5, 7
89
90 2:
91 cmplwi 0, r5, 4
92 blt 3f
93
94 lwzu r0, 4(r4)
95 addi r5, r5, -4
96 stwu r0, 4(r6)
97
98 3:
99 cmpwi 0, r5, 0
100 beqlr
101 mtctr r5
102 addi r4, r4, 3
103 addi r6, r6, 3
104
105 4:
106 lbzu r0, 1(r4)
107 stbu r0, 1(r6)
108 bdnz 4b
109 blr
110
111 5:
112 subfic r0, r0, 4
113 mtctr r0
114
115 6:
116 lbz r7, 4(r4)
117 addi r4, r4, 1
118 stb r7, 4(r6)
119 addi r6, r6, 1
120 bdnz 6b
121 subf r5, r0, r5
122 rlwinm. r7, r5, 32-3, 3, 31
123 beq 2b
124 mtctr r7
125 b 1b
126
127jump_to_kernel:
128
129 # r3 = bootinfo (pa)
130 # r4 = bootinfo_size
131 # r5 = trans (pa)
132 # r6 = bytes to copy
133 # r7 = real_mode (pa)
134
135 # disable interrupts
136
137 mfmsr r31
138 rlwinm r31, r31, 0, 17, 15
139 mtmsr r31
140
141 # set real_mode meeting point address
142
143 mtspr srr0, r7
144
145 # jumps to real_mode
146
147 mfmsr r31
148 lis r30, ~0@h
149 ori r30, r30, ~(msr_ir | msr_dr | msr_ee)@l
150 and r31, r31, r30
151 mtspr srr1, r31
152
153 sync
154 isync
155 rfi
156
157.align PAGE_WIDTH
158balloc_base:
159 .fill BALLOC_MAX_SIZE
160
161.section REALMODE, "ax"
162
163.align PAGE_WIDTH
164.global real_mode
165real_mode:
166
167 # copy kernel to proper location
168 #
169 # r3 = bootinfo (pa)
170 # r4 = bootinfo_size
171 # r5 = trans (pa)
172 # r6 = bytes to copy
173
174 li r31, PAGE_SIZE >> 2
175 li r30, 0
176
177 page_copy:
178
179 cmpwi r6, 0
180 beq copy_end
181
182 # copy page
183
184 mtctr r31
185 lwz r29, 0(r5)
186
187 copy_loop:
188
189 lwz r28, 0(r29)
190 stw r28, 0(r30)
191
192 SMC_COHERENCY r30
193
194 addi r29, r29, 4
195 addi r30, r30, 4
196 subi r6, r6, 4
197
198 cmpwi r6, 0
199 beq copy_end
200
201 bdnz copy_loop
202
203 addi r5, r5, 4
204 b page_copy
205
206 copy_end:
207
208 # initially fill segment registers
209
210 li r31, 0
211
212 li r29, 8
213 mtctr r29
214 li r30, 0 # ASID 0 (VSIDs 0 .. 7)
215
216 seg_fill_uspace:
217
218 mtsrin r30, r31
219 addi r30, r30, 1
220 addis r31, r31, 0x1000 # move to next SR
221
222 bdnz seg_fill_uspace
223
224 li r29, 8
225 mtctr r29
226 lis r30, 0x4000 # priviledged access only
227 ori r30, r30, 8 # ASID 0 (VSIDs 8 .. 15)
228
229 seg_fill_kernel:
230
231 mtsrin r30, r31
232 addi r30, r30, 1
233 addis r31, r31, 0x1000 # move to next SR
234
235 bdnz seg_fill_kernel
236
237 # invalidate block address translation registers
238
239 li r30, 0
240
241 mtspr ibat0u, r30
242 mtspr ibat0l, r30
243
244 mtspr ibat1u, r30
245 mtspr ibat1l, r30
246
247 mtspr ibat2u, r30
248 mtspr ibat2l, r30
249
250 mtspr ibat3u, r30
251 mtspr ibat3l, r30
252
253 mtspr dbat0u, r30
254 mtspr dbat0l, r30
255
256 mtspr dbat1u, r30
257 mtspr dbat1l, r30
258
259 mtspr dbat2u, r30
260 mtspr dbat2l, r30
261
262 mtspr dbat3u, r30
263 mtspr dbat3l, r30
264
265 # create empty Page Hash Table
266 # on top of memory, size 64 KB
267
268 lwz r31, 0(r3) # r31 = memory size
269
270 lis r30, 65536@h
271 ori r30, r30, 65536@l # r30 = 65536
272
273 subi r29, r30, 1 # r29 = 65535
274
275 sub r31, r31, r30
276 andc r31, r31, r29 # pht = ALIGN_DOWN(memory_size - 65536, 65536)
277
278 mtsdr1 r31
279
280 li r29, 2
281 srw r30, r30, r29 # r30 = 16384
282 li r29, 0
283
284 pht_clear:
285
286 # write zeroes
287
288 stw r29, 0(r31)
289 FLUSH_DCACHE r31
290
291 addi r31, r31, 4
292 subi r30, r30, 4
293
294 cmpwi r30, 0
295 beq clear_end
296
297 bdnz pht_clear
298
299 clear_end:
300
301#ifdef CONFIG_BAT
302
303 # create BAT identity mapping
304
305 lwz r31, 0(r3) # r31 = memory size
306
307 lis r29, 0x0002
308 cmpw r31, r29
309 blt no_bat # less than 128 KB -> no BAT
310
311 li r29, 18
312 srw r31, r31, r29 # r31 = total >> 18
313
314 # create Block Length mask by replicating
315 # the leading logical one 14 times
316
317 li r29, 14
318 mtctr r31
319 li r29, 1
320
321 bat_mask:
322 srw r30, r31, r29 # r30 = mask >> 1
323 or r31, r31, r30 # mask = mask | r30
324
325 bdnz bat_mask
326
327 andi. r31, r31, 0x07ff # mask = mask & 0x07ff (BAT can map up to 256 MB)
328
329 li r29, 2
330 slw r31, r31, r29 # mask = mask << 2
331 ori r31, r31, 0x0002 # mask = mask | 0x0002 (priviledged access only)
332
333 lis r29, 0x8000
334 or r29, r29, r31
335
336 lis r30, 0x0000
337 ori r30, r30, 0x0002
338
339 mtspr ibat0u, r29
340 mtspr ibat0l, r30
341
342 mtspr dbat0u, r29
343 mtspr dbat0l, r30
344
345 no_bat:
346
347#endif
348
349 # flush TLB
350
351 TLB_FLUSH r31
352
353 # start the kernel
354 #
355 # pc = PA2KA(BOOT_OFFSET)
356 # r3 = bootinfo (pa)
357 # sprg0 = BOOT_OFFSET
358 # sprg3 = physical memory size
359 # sp = 0 (pa)
360
361 lis r31, PA2KA(BOOT_OFFSET)@ha
362 addi r31, r31, PA2KA(BOOT_OFFSET)@l
363 mtspr srr0, r31
364
365 lis r31, BOOT_OFFSET@ha
366 addi r31, r31, BOOT_OFFSET@l
367 mtsprg0 r31
368
369 lwz r31, 0(r3)
370 mtsprg3 r31
371
372 li sp, 0
373
374 mfmsr r31
375 ori r31, r31, (msr_ir | msr_dr)@l
376 mtspr srr1, r31
377
378 sync
379 isync
380 rfi
381
382.align PAGE_WIDTH
383.global trans
384trans:
385 .rept TRANS_SIZE
386 .int 0
387 .endr
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