1 | #
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2 | # Copyright (c) 2006 Martin Decky
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3 | # All rights reserved.
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4 | #
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5 | # Redistribution and use in source and binary forms, with or without
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6 | # modification, are permitted provided that the following conditions
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7 | # are met:
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8 | #
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9 | # - Redistributions of source code must retain the above copyright
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10 | # notice, this list of conditions and the following disclaimer.
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11 | # - Redistributions in binary form must reproduce the above copyright
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12 | # notice, this list of conditions and the following disclaimer in the
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13 | # documentation and/or other materials provided with the distribution.
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14 | # - The name of the author may not be used to endorse or promote products
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15 | # derived from this software without specific prior written permission.
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16 | #
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17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | #
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28 |
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29 | #include "asm.h"
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30 | #include "regname.h"
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31 | #include "ofwarch.h"
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32 |
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33 | .macro SMC_COHERENCY addr
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34 | dcbst 0, \addr
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35 | sync
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36 | icbi 0, \addr
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37 | sync
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38 | isync
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39 | .endm
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40 |
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41 | .macro FLUSH_DCACHE addr
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42 | dcbst 0, \addr
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43 | sync
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44 | isync
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45 | .endm
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46 |
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47 | .macro TLB_FLUSH reg
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48 | li \reg, 0
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49 | sync
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50 |
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51 | .rept 64
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52 | tlbie \reg
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53 | addi \reg, \reg, 0x1000
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54 | .endr
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55 |
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56 | eieio
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57 | tlbsync
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58 | sync
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59 | .endm
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60 |
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61 | .text
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62 |
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63 | .global halt
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64 | .global memcpy
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65 | .global jump_to_kernel
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66 | .global balloc_base
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67 |
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68 | halt:
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69 | b halt
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70 |
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71 | memcpy:
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72 | srwi. r7, r5, 3
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73 | addi r6, r3, -4
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74 | addi r4, r4, -4
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75 | beq 2f
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76 |
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77 | andi. r0, r6, 3
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78 | mtctr r7
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79 | bne 5f
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80 |
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81 | 1:
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82 | lwz r7, 4(r4)
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83 | lwzu r8, 8(r4)
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84 | stw r7, 4(r6)
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85 | stwu r8, 8(r6)
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86 | bdnz 1b
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87 |
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88 | andi. r5, r5, 7
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89 |
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90 | 2:
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91 | cmplwi 0, r5, 4
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92 | blt 3f
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93 |
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94 | lwzu r0, 4(r4)
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95 | addi r5, r5, -4
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96 | stwu r0, 4(r6)
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97 |
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98 | 3:
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99 | cmpwi 0, r5, 0
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100 | beqlr
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101 | mtctr r5
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102 | addi r4, r4, 3
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103 | addi r6, r6, 3
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104 |
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105 | 4:
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106 | lbzu r0, 1(r4)
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107 | stbu r0, 1(r6)
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108 | bdnz 4b
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109 | blr
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110 |
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111 | 5:
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112 | subfic r0, r0, 4
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113 | mtctr r0
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114 |
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115 | 6:
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116 | lbz r7, 4(r4)
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117 | addi r4, r4, 1
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118 | stb r7, 4(r6)
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119 | addi r6, r6, 1
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120 | bdnz 6b
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121 | subf r5, r0, r5
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122 | rlwinm. r7, r5, 32-3, 3, 31
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123 | beq 2b
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124 | mtctr r7
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125 | b 1b
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126 |
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127 | jump_to_kernel:
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128 |
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129 | # r3 = bootinfo (pa)
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130 | # r4 = bootinfo_size
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131 | # r5 = trans (pa)
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132 | # r6 = bytes to copy
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133 | # r7 = real_mode (pa)
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134 |
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135 | # disable interrupts
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136 |
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137 | mfmsr r31
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138 | rlwinm r31, r31, 0, 17, 15
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139 | mtmsr r31
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140 |
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141 | # set real_mode meeting point address
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142 |
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143 | mtspr srr0, r7
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144 |
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145 | # jumps to real_mode
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146 |
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147 | mfmsr r31
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148 | lis r30, ~0@h
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149 | ori r30, r30, ~(msr_ir | msr_dr | msr_ee)@l
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150 | and r31, r31, r30
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151 | mtspr srr1, r31
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152 |
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153 | sync
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154 | isync
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155 | rfi
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156 |
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157 | .align PAGE_WIDTH
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158 | balloc_base:
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159 | .fill BALLOC_MAX_SIZE
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160 |
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161 | .section REALMODE, "ax"
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162 |
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163 | .align PAGE_WIDTH
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164 | .global real_mode
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165 | real_mode:
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166 |
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167 | # copy kernel to proper location
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168 | #
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169 | # r3 = bootinfo (pa)
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170 | # r4 = bootinfo_size
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171 | # r5 = trans (pa)
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172 | # r6 = bytes to copy
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173 |
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174 | li r31, PAGE_SIZE >> 2
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175 | li r30, 0
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176 |
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177 | page_copy:
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178 |
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179 | cmpwi r6, 0
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180 | beq copy_end
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181 |
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182 | # copy page
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183 |
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184 | mtctr r31
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185 | lwz r29, 0(r5)
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186 |
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187 | copy_loop:
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188 |
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189 | lwz r28, 0(r29)
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190 | stw r28, 0(r30)
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191 |
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192 | SMC_COHERENCY r30
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193 |
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194 | addi r29, r29, 4
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195 | addi r30, r30, 4
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196 | subi r6, r6, 4
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197 |
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198 | cmpwi r6, 0
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199 | beq copy_end
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200 |
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201 | bdnz copy_loop
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202 |
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203 | addi r5, r5, 4
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204 | b page_copy
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205 |
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206 | copy_end:
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207 |
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208 | # initially fill segment registers
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209 |
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210 | li r31, 0
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211 |
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212 | li r29, 8
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213 | mtctr r29
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214 | li r30, 0 # ASID 0 (VSIDs 0 .. 7)
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215 |
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216 | seg_fill_uspace:
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217 |
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218 | mtsrin r30, r31
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219 | addi r30, r30, 1
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220 | addis r31, r31, 0x1000 # move to next SR
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221 |
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222 | bdnz seg_fill_uspace
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223 |
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224 | li r29, 8
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225 | mtctr r29
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226 | lis r30, 0x4000 # priviledged access only
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227 | ori r30, r30, 8 # ASID 0 (VSIDs 8 .. 15)
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228 |
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229 | seg_fill_kernel:
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230 |
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231 | mtsrin r30, r31
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232 | addi r30, r30, 1
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233 | addis r31, r31, 0x1000 # move to next SR
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234 |
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235 | bdnz seg_fill_kernel
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236 |
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237 | # invalidate block address translation registers
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238 |
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239 | li r30, 0
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240 |
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241 | mtspr ibat0u, r30
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242 | mtspr ibat0l, r30
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243 |
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244 | mtspr ibat1u, r30
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245 | mtspr ibat1l, r30
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246 |
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247 | mtspr ibat2u, r30
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248 | mtspr ibat2l, r30
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249 |
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250 | mtspr ibat3u, r30
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251 | mtspr ibat3l, r30
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252 |
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253 | mtspr dbat0u, r30
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254 | mtspr dbat0l, r30
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255 |
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256 | mtspr dbat1u, r30
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257 | mtspr dbat1l, r30
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258 |
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259 | mtspr dbat2u, r30
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260 | mtspr dbat2l, r30
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261 |
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262 | mtspr dbat3u, r30
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263 | mtspr dbat3l, r30
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264 |
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265 | # create empty Page Hash Table
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266 | # on top of memory, size 64 KB
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267 |
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268 | lwz r31, 0(r3) # r31 = memory size
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269 |
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270 | lis r30, 65536@h
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271 | ori r30, r30, 65536@l # r30 = 65536
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272 |
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273 | subi r29, r30, 1 # r29 = 65535
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274 |
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275 | sub r31, r31, r30
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276 | andc r31, r31, r29 # pht = ALIGN_DOWN(memory_size - 65536, 65536)
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277 |
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278 | mtsdr1 r31
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279 |
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280 | li r29, 2
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281 | srw r30, r30, r29 # r30 = 16384
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282 | li r29, 0
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283 |
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284 | pht_clear:
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285 |
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286 | # write zeroes
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287 |
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288 | stw r29, 0(r31)
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289 | FLUSH_DCACHE r31
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290 |
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291 | addi r31, r31, 4
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292 | subi r30, r30, 4
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293 |
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294 | cmpwi r30, 0
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295 | beq clear_end
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296 |
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297 | bdnz pht_clear
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298 |
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299 | clear_end:
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300 |
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301 | #ifdef CONFIG_BAT
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302 |
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303 | # create BAT identity mapping
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304 |
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305 | lwz r31, 0(r3) # r31 = memory size
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306 |
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307 | lis r29, 0x0002
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308 | cmpw r31, r29
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309 | blt no_bat # less than 128 KB -> no BAT
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310 |
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311 | li r29, 18
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312 | srw r31, r31, r29 # r31 = total >> 18
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313 |
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314 | # create Block Length mask by replicating
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315 | # the leading logical one 14 times
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316 |
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317 | li r29, 14
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318 | mtctr r31
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319 | li r29, 1
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320 |
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321 | bat_mask:
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322 | srw r30, r31, r29 # r30 = mask >> 1
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323 | or r31, r31, r30 # mask = mask | r30
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324 |
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325 | bdnz bat_mask
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326 |
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327 | andi. r31, r31, 0x07ff # mask = mask & 0x07ff (BAT can map up to 256 MB)
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328 |
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329 | li r29, 2
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330 | slw r31, r31, r29 # mask = mask << 2
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331 | ori r31, r31, 0x0002 # mask = mask | 0x0002 (priviledged access only)
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332 |
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333 | lis r29, 0x8000
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334 | or r29, r29, r31
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335 |
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336 | lis r30, 0x0000
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337 | ori r30, r30, 0x0002
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338 |
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339 | mtspr ibat0u, r29
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340 | mtspr ibat0l, r30
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341 |
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342 | mtspr dbat0u, r29
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343 | mtspr dbat0l, r30
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344 |
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345 | no_bat:
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346 |
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347 | #endif
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348 |
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349 | # flush TLB
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350 |
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351 | TLB_FLUSH r31
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352 |
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353 | # start the kernel
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354 | #
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355 | # pc = PA2KA(BOOT_OFFSET)
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356 | # r3 = bootinfo (pa)
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357 | # sprg0 = BOOT_OFFSET
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358 | # sprg3 = physical memory size
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359 | # sp = 0 (pa)
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360 |
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361 | lis r31, PA2KA(BOOT_OFFSET)@ha
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362 | addi r31, r31, PA2KA(BOOT_OFFSET)@l
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363 | mtspr srr0, r31
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364 |
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365 | lis r31, BOOT_OFFSET@ha
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366 | addi r31, r31, BOOT_OFFSET@l
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367 | mtsprg0 r31
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368 |
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369 | lwz r31, 0(r3)
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370 | mtsprg3 r31
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371 |
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372 | li sp, 0
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373 |
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374 | mfmsr r31
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375 | ori r31, r31, (msr_ir | msr_dr)@l
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376 | mtspr srr1, r31
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377 |
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378 | sync
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379 | isync
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380 | rfi
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381 |
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382 | .align PAGE_WIDTH
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383 | .global trans
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384 | trans:
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385 | .rept TRANS_SIZE
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386 | .int 0
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387 | .endr
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