source: mainline/boot/arch/ppc32/loader/asm.S@ 9a1b20c

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 9a1b20c was df4ed85, checked in by Jakub Jermar <jakub@…>, 19 years ago

© versus ©

  • Property mode set to 100644
File size: 6.2 KB
RevLine 
[5eb84ab]1#
[df4ed85]2# Copyright (c) 2006 Martin Decky
[5eb84ab]3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
[01cb210]29#include "asm.h"
[5eb84ab]30#include "regname.h"
[4520dc02]31#include "debug.inc"
[5eb84ab]32
33.text
34
[01cb210]35.global halt
[f941347]36.global memcpy
[5eb84ab]37.global jump_to_kernel
38
[01cb210]39halt:
40 b halt
[bcc223b2]41
[f941347]42memcpy:
43 srwi. r7, r5, 3
44 addi r6, r3, -4
45 addi r4, r4, -4
46 beq 2f
47
48 andi. r0, r6, 3
49 mtctr r7
50 bne 5f
51
52 1:
53
54 lwz r7, 4(r4)
55 lwzu r8, 8(r4)
56 stw r7, 4(r6)
57 stwu r8, 8(r6)
58 bdnz 1b
59
60 andi. r5, r5, 7
61
62 2:
63
64 cmplwi 0, r5, 4
65 blt 3f
66
67 lwzu r0, 4(r4)
68 addi r5, r5, -4
69 stwu r0, 4(r6)
70
71 3:
72
73 cmpwi 0, r5, 0
74 beqlr
75 mtctr r5
76 addi r4, r4, 3
77 addi r6, r6, 3
78
79 4:
80
81 lbzu r0, 1(r4)
82 stbu r0, 1(r6)
83 bdnz 4b
84 blr
85
86 5:
87
88 subfic r0, r0, 4
89 mtctr r0
90
91 6:
92
93 lbz r7, 4(r4)
94 addi r4, r4, 1
95 stb r7, 4(r6)
96 addi r6, r6, 1
97 bdnz 6b
98 subf r5, r0, r5
99 rlwinm. r7, r5, 32-3, 3, 31
100 beq 2b
101 mtctr r7
102 b 1b
103
104
[5eb84ab]105jump_to_kernel:
[1fbe8da2]106
[c6143b4]107 # r3 = bootinfo (pa)
108 # r4 = bootinfo_size
109 # r5 = trans (pa)
[de1b8b1]110 # r6 = bytes to copy
111 # r7 = real_mode (pa)
[4520dc02]112 # r8 = framebuffer (pa)
113 # r9 = scanline
[1fbe8da2]114
[ab4ac14]115 # disable interrupts
116
117 mfmsr r31
118 rlwinm r31, r31, 0, 17, 15
119 mtmsr r31
120
121 # set real_mode meeting point address
122
[de1b8b1]123 mtspr srr0, r7
[1fbe8da2]124
125 # jumps to real_mode
126
[01cb210]127 mfmsr r31
128 lis r30, ~0@h
[4520dc02]129 ori r30, r30, ~(msr_ir | msr_dr | msr_ee)@l
[01cb210]130 and r31, r31, r30
131 mtspr srr1, r31
[89343aac]132
133 sync
134 isync
[1fbe8da2]135 rfi
136
[02e7700]137.section REALMODE, "ax"
[01cb210]138.align PAGE_WIDTH
[1fbe8da2]139.global real_mode
140
141real_mode:
[bbeb5e4]142
143 DEBUG_INIT
[4520dc02]144 DEBUG_real_mode
[01cb210]145
146 # copy kernel to proper location
147 #
[c6143b4]148 # r5 = trans (pa)
[de1b8b1]149 # r6 = bytes to copy
[4520dc02]150 # r8 = framebuffer (pa)
151 # r9 = scanline
[01cb210]152
[1f330de]153 li r31, PAGE_SIZE >> 2
[01cb210]154 li r30, 0
155
156 page_copy:
157
[c6143b4]158 cmpwi r6, 0
[01cb210]159 beq copy_end
160
[1f330de]161 # copy page
[01cb210]162
163 mtctr r31
[c6143b4]164 lwz r29, 0(r5)
[01cb210]165
[bbeb5e4]166 DEBUG_INIT
167 DEBUG_copy_loop
168
[01cb210]169 copy_loop:
170
171 lwz r28, 0(r29)
172 stw r28, 0(r30)
173
174 addi r29, r29, 4
175 addi r30, r30, 4
[c6143b4]176 subi r6, r6, 4
[1f330de]177
[c6143b4]178 cmpwi r6, 0
[1f330de]179 beq copy_end
[01cb210]180
181 bdnz copy_loop
[bbeb5e4]182
183 DEBUG_end_copy_loop
[01cb210]184
[c6143b4]185 addi r5, r5, 4
[01cb210]186 b page_copy
187
188 copy_end:
[1f330de]189
[bbeb5e4]190 DEBUG_segments
191
[02e7700]192 # initially fill segment registers
[2988616b]193
[543c31f]194 li r31, 0
[2988616b]195
196 li r29, 8
197 mtctr r29
[bab785fe]198 li r30, 0 # ASID 0 (VSIDs 0 .. 7)
[543c31f]199
[2988616b]200 seg_fill_uspace:
[1fbe8da2]201
[543c31f]202 mtsrin r30, r31
[2988616b]203 addi r30, r30, 1
[543c31f]204 addis r31, r31, 0x1000 # move to next SR
205
[2988616b]206 bdnz seg_fill_uspace
207
208 li r29, 8
209 mtctr r29
[bab785fe]210 lis r30, 0x4000 # priviledged access only
211 ori r30, r30, 8 # ASID 0 (VSIDs 8 .. 15)
[2988616b]212
213 seg_fill_kernel:
214
215 mtsrin r30, r31
216 addi r30, r30, 1
217 addis r31, r31, 0x1000 # move to next SR
218
219 bdnz seg_fill_kernel
[1f330de]220
221 # invalidate block address translation registers
222
[bbeb5e4]223 DEBUG_bat
224
[c3b5cdf]225 li r30, 0
226
[1f330de]227 mtspr ibat0u, r30
228 mtspr ibat0l, r30
229
230 mtspr ibat1u, r30
231 mtspr ibat1l, r30
232
233 mtspr ibat2u, r30
234 mtspr ibat2l, r30
235
236 mtspr ibat3u, r30
237 mtspr ibat3l, r30
238
239 mtspr dbat0u, r30
240 mtspr dbat0l, r30
241
242 mtspr dbat1u, r30
243 mtspr dbat1l, r30
244
245 mtspr dbat2u, r30
246 mtspr dbat2l, r30
247
248 mtspr dbat3u, r30
249 mtspr dbat3l, r30
[1fbe8da2]250
[60316bd]251 # create empty Page Hash Table
252 # on top of memory, size 64 KB
[c04bdb4]253
254 DEBUG_pht
255
[60316bd]256 lwz r31, 0(r3) # r31 = memory size
[c04bdb4]257
[60316bd]258 lis r30, 65536@h
259 ori r30, r30, 65536@l # r30 = 65536
260
261 subi r29, r30, 1 # r29 = 65535
262
263 sub r31, r31, r30
264 andc r31, r31, r29 # pht = ALIGN_DOWN(memory_size - 65536, 65536)
265
266 mtsdr1 r31
267
268 li r29, 2
269 srw r30, r30, r29 # r30 = 16384
[2988616b]270 li r29, 0
271
272 pht_clear:
273
[bab785fe]274 # write zeroes
275
[2988616b]276 stw r29, 0(r31)
277
278 addi r31, r31, 4
279 subi r30, r30, 4
280
281 cmpwi r30, 0
282 beq clear_end
283
284 bdnz pht_clear
285
286 DEBUG_end_pht_clear
287
288 clear_end:
289
290#ifdef CONFIG_BAT
291
[bab785fe]292 # create BAT identity mapping
293
[bbeb5e4]294 DEBUG_mapping
295
[60316bd]296 lwz r31, 0(r3) # r31 = memory size
[bab785fe]297
298 lis r29, 0x0002
299 cmpw r31, r29
300 blt no_bat # less than 128 KB -> no BAT
301
302 li r29, 18
303 srw r31, r31, r29 # r31 = total >> 18
[1f330de]304
[bab785fe]305 # create Block Length mask by replicating
306 # the leading logical one 14 times
307
308 li r29, 14
309 mtctr r31
310 li r29, 1
311
312 bat_mask:
313 srw r30, r31, r29 # r30 = mask >> 1
314 or r31, r31, r30 # mask = mask | r30
315
316 bdnz bat_mask
317
[611150b]318 DEBUG_bat_mask
319
[bab785fe]320 andi. r31, r31, 0x07ff # mask = mask & 0x07ff (BAT can map up to 256 MB)
321
322 li r29, 2
323 slw r31, r31, r29 # mask = mask << 2
324 ori r31, r31, 0x0002 # mask = mask | 0x0002 (priviledged access only)
325
326 lis r29, 0x8000
327 or r29, r29, r31
[1f330de]328
329 lis r30, 0x0000
330 ori r30, r30, 0x0002
331
[bab785fe]332 mtspr ibat0u, r29
[1f330de]333 mtspr ibat0l, r30
334
[bab785fe]335 mtspr dbat0u, r29
[1f330de]336 mtspr dbat0l, r30
[bab785fe]337
338 no_bat:
[2988616b]339
340#endif
[1f330de]341
[bbeb5e4]342 DEBUG_tlb
343
[01cb210]344 tlbia
[0ab829c]345 tlbsync
[01cb210]346
[bbeb5e4]347 DEBUG_prepare
348
[01cb210]349 # start the kernel
[1fbe8da2]350 #
[2988616b]351 # pc = KERNEL_START_ADDR
[c6143b4]352 # r3 = bootinfo (pa)
[2988616b]353 # sprg0 = KA2PA(KERNEL_START_ADDR)
354 # sprg3 = physical memory size
355 # sp = 0 (pa)
[01cb210]356
357 lis r31, KERNEL_START_ADDR@ha
358 addi r31, r31, KERNEL_START_ADDR@l
[1fbe8da2]359
[01cb210]360 mtspr srr0, r31
[1fbe8da2]361
[2988616b]362 subis r31, r31, 0x8000
363 mtsprg0 r31
364
365 lwz r31, 0(r3)
366 mtsprg3 r31
367
368 li sp, 0
369
[01cb210]370 mfmsr r31
371 ori r31, r31, (msr_ir | msr_dr)@l
372 mtspr srr1, r31
[1fbe8da2]373
[38fe9d0]374 sync
375 isync
[4520dc02]376
377 DEBUG_rfi
[1fbe8da2]378 rfi
[01cb210]379
380.align PAGE_WIDTH
381.global trans
382trans:
383 .space (TRANS_SIZE * TRANS_ITEM_SIZE)
Note: See TracBrowser for help on using the repository browser.