source: mainline/boot/arch/mips32/src/asm.S@ 84a1a54

Last change on this file since 84a1a54 was 0c334805, checked in by Jakub Jermar <jakub@…>, 8 years ago

Allow expansion of macro instructions

  • Property mode set to 100644
File size: 3.4 KB
Line 
1#
2# Copyright (c) 2006 Martin Decky
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include <abi/asmtool.h>
30#include <arch/arch.h>
31#include <arch/regname.h>
32
33.set noat
34.set noreorder
35
36.section BOOTSTRAP
37
38SYMBOL(start)
39 /*
40 * Setup the CP0 configuration
41 * - Disable 64-bit kernel addressing mode
42 * - Disable 64-bit supervisor adressing mode
43 * - Disable 64-bit user addressing mode
44 */
45 mfc0 $a0, $status
46 la $a1, 0xffffff1f
47 and $a0, $a1, $a0
48 mtc0 $a0, $status
49
50#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
51 /*
52 * Remember the size of the SDRAM in bootinfo.
53 */
54 la $a0, PA2KA(BOOTINFO_OFFSET)
55 sw $a3, 0($a0)
56#endif
57
58 /*
59 * Setup CPU map (on msim this code
60 * is executed in parallel on all CPUs,
61 * but it not an issue).
62 */
63 la $a0, PA2KA(CPUMAP_OFFSET)
64
65 sw $zero, 0($a0)
66 sw $zero, 4($a0)
67 sw $zero, 8($a0)
68 sw $zero, 12($a0)
69
70 sw $zero, 16($a0)
71 sw $zero, 20($a0)
72 sw $zero, 24($a0)
73 sw $zero, 28($a0)
74
75 sw $zero, 32($a0)
76 sw $zero, 36($a0)
77 sw $zero, 40($a0)
78 sw $zero, 44($a0)
79
80 sw $zero, 48($a0)
81 sw $zero, 52($a0)
82 sw $zero, 56($a0)
83 sw $zero, 60($a0)
84
85 sw $zero, 64($a0)
86 sw $zero, 68($a0)
87 sw $zero, 72($a0)
88 sw $zero, 76($a0)
89
90 sw $zero, 80($a0)
91 sw $zero, 84($a0)
92 sw $zero, 88($a0)
93 sw $zero, 92($a0)
94
95 sw $zero, 96($a0)
96 sw $zero, 100($a0)
97 sw $zero, 104($a0)
98 sw $zero, 108($a0)
99
100 sw $zero, 112($a0)
101 sw $zero, 116($a0)
102 sw $zero, 120($a0)
103 sw $zero, 124($a0)
104
105 lui $a1, 1
106
107#ifdef MACHINE_msim
108
109 /* Read dorder value */
110 la $k0, MSIM_DORDER_ADDRESS
111 lw $k1, ($k0)
112
113 /*
114 * If we are not running on BSP
115 * then end in an infinite loop.
116 */
117 beq $k1, $zero, bsp
118 nop
119
120 /* Record CPU presence */
121 sll $a2, $k1, 2
122 addu $a2, $a2, $a0
123 sw $a1, ($a2)
124
125 loop:
126 j loop
127 nop
128
129#endif
130
131 bsp:
132 /* Record CPU presence */
133 sw $a1, ($a0)
134
135 /* Setup initial stack */
136 la $sp, PA2KA(STACK_OFFSET)
137
138 j bootstrap
139 nop
140
141.text
142
143FUNCTION_BEGIN(halt)
144 j halt
145 nop
146FUNCTION_END(halt)
147
148FUNCTION_BEGIN(jump_to_kernel)
149 /*
150 * TODO:
151 *
152 * Make sure that the I-cache, D-cache and memory are mutually
153 * coherent before passing control to the copied code.
154 */
155 j $a0
156 nop
157FUNCTION_END(jump_to_kernel)
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